diff options
Diffstat (limited to 'fpga/usrp3/top/x400/dboards/zbx/cpld/doc')
| -rw-r--r-- | fpga/usrp3/top/x400/dboards/zbx/cpld/doc/ZBX_CPLD_right.htm | 68 |
1 files changed, 56 insertions, 12 deletions
diff --git a/fpga/usrp3/top/x400/dboards/zbx/cpld/doc/ZBX_CPLD_right.htm b/fpga/usrp3/top/x400/dboards/zbx/cpld/doc/ZBX_CPLD_right.htm index 97bd80ee4..3d8f4475c 100644 --- a/fpga/usrp3/top/x400/dboards/zbx/cpld/doc/ZBX_CPLD_right.htm +++ b/fpga/usrp3/top/x400/dboards/zbx/cpld/doc/ZBX_CPLD_right.htm @@ -1486,9 +1486,9 @@ This enum is used to create the constants held in the basic registers in both ve <tr valign="top"> - <td class='value'>553848841</td> + <td class='value'>554767892</td> - <td class='l'>0x21031009</td> + <td class='l'>0x21111614</td> <td class="l" style="text-align: left;"> <p class="name"><a name='BASIC_REGS_REGMAP|BASIC_REGISTERS_VALUES|CPLD_REVISION'></a>CPLD_REVISION</p> @@ -6914,10 +6914,12 @@ Offers ability to enable or disable the PLL reference clock. <a name="RECONFIG_REGMAP|FLASH_PRIMARY_IMAGE_ADDR_ENUM"></a> <h3 class="enum">FLASH_PRIMARY_IMAGE_ADDR_ENUM Enumeration</h3> -Those values are the start and end address of the CFM image flash - sector from Intel's On-Chip Flash IP Generator. Note that the values - given in the IP generator are byte based where the values of this enum - are U32 based (divided by 4). +These values are the start and end address of the CFM image flash + sector from Intel's On-Chip Flash IP Generator. + Be aware that three different values exist per each of the two + supported MAX10 variants: 10M04 and 10M08 + Note that the values given in the IP generator are byte based where + the values of this enum are U32 based (divided by 4). <table class="enum" border="0" cellspacing="0" cellpadding="0"> <tr class="header" valign="center"> @@ -6941,7 +6943,20 @@ Those values are the start and end address of the CFM image flash <td class='l'>0x01000</td> <td class="l" style="text-align: left;"> - <p class="name"><a name='RECONFIG_REGMAP|FLASH_PRIMARY_IMAGE_ADDR_ENUM|FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT'></a>FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT</p> + <p class="name"><a name='RECONFIG_REGMAP|FLASH_PRIMARY_IMAGE_ADDR_ENUM|FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT_10M04'></a>FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT_10M04</p> + +</td> + +</tr> + +<tr valign="top"> + + <td class='value'>8192</td> + + <td class='l'>0x02000</td> + + <td class="l" style="text-align: left;"> + <p class="name"><a name='RECONFIG_REGMAP|FLASH_PRIMARY_IMAGE_ADDR_ENUM|FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT_10M08'></a>FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT_10M08</p> </td> @@ -6954,7 +6969,20 @@ Those values are the start and end address of the CFM image flash <td class='l'>0x09C00</td> <td class="l" style="text-align: left;"> - <p class="name"><a name='RECONFIG_REGMAP|FLASH_PRIMARY_IMAGE_ADDR_ENUM|FLASH_PRIMARY_IMAGE_START_ADDR'></a>FLASH_PRIMARY_IMAGE_START_ADDR</p> + <p class="name"><a name='RECONFIG_REGMAP|FLASH_PRIMARY_IMAGE_ADDR_ENUM|FLASH_PRIMARY_IMAGE_START_ADDR_10M04'></a>FLASH_PRIMARY_IMAGE_START_ADDR_10M04</p> + +</td> + +</tr> + +<tr valign="top"> + + <td class='value'>44032</td> + + <td class='l'>0x0AC00</td> + + <td class="l" style="text-align: left;"> + <p class="name"><a name='RECONFIG_REGMAP|FLASH_PRIMARY_IMAGE_ADDR_ENUM|FLASH_PRIMARY_IMAGE_START_ADDR_10M08'></a>FLASH_PRIMARY_IMAGE_START_ADDR_10M08</p> </td> @@ -6967,7 +6995,20 @@ Those values are the start and end address of the CFM image flash <td class='l'>0x127FF</td> <td class="l" style="text-align: left;"> - <p class="name"><a name='RECONFIG_REGMAP|FLASH_PRIMARY_IMAGE_ADDR_ENUM|FLASH_PRIMARY_IMAGE_END_ADDR'></a>FLASH_PRIMARY_IMAGE_END_ADDR</p> + <p class="name"><a name='RECONFIG_REGMAP|FLASH_PRIMARY_IMAGE_ADDR_ENUM|FLASH_PRIMARY_IMAGE_END_ADDR_10M04'></a>FLASH_PRIMARY_IMAGE_END_ADDR_10M04</p> + +</td> + +</tr> + +<tr valign="top"> + + <td class='value'>79871</td> + + <td class='l'>0x137FF</td> + + <td class="l" style="text-align: left;"> + <p class="name"><a name='RECONFIG_REGMAP|FLASH_PRIMARY_IMAGE_ADDR_ENUM|FLASH_PRIMARY_IMAGE_END_ADDR_10M08'></a>FLASH_PRIMARY_IMAGE_END_ADDR_10M08</p> </td> @@ -7357,9 +7398,12 @@ Total Offset =</td></tr> <p>Defines the sector to be erased. Has to be set latest with the write access which starts the erase operation by strobing <a href="#RECONFIG_REGMAP|FLASH_CONTROL_REG|FLASH_ERASE_STB">FLASH_ERASE_STB</a>.<br> - If the flash is configured to support memory initialization (see - <a href="#RECONFIG_REGMAP|FLASH_STATUS_REG|FLASH_MEM_INIT_ENABLED">FLASH_MEM_INIT_ENABLED</a> flag) the sectors 2 to 4 have to be erased. - If the flag is not asserted only sector 4 has to be erased.</p> + With 10M04 variants, if the flash is configured to support memory + initialization (see <a href="#RECONFIG_REGMAP|FLASH_STATUS_REG|FLASH_MEM_INIT_ENABLED">FLASH_MEM_INIT_ENABLED</a> flag) the sectors 2 + to 4 have to be erased. If the flag is not asserted only sector 4 + has to be erased. + With 10M08 variants, the sectors to be erased are 3 to 5 when + using memory initialization or only sector 5 otherwise.</p> </td> </tr> |