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-rw-r--r--fpga/usrp3/top/n3xx/dboards/rh/Makefile.srcs32
1 files changed, 32 insertions, 0 deletions
diff --git a/fpga/usrp3/top/n3xx/dboards/rh/Makefile.srcs b/fpga/usrp3/top/n3xx/dboards/rh/Makefile.srcs
new file mode 100644
index 000000000..1296e68e6
--- /dev/null
+++ b/fpga/usrp3/top/n3xx/dboards/rh/Makefile.srcs
@@ -0,0 +1,32 @@
+#
+# Copyright 2018 Ettus Research, a National Instruments Company
+#
+
+##################################################
+# DB IFC Sources
+##################################################
+RHODIUM_DB_SRCS = $(abspath $(addprefix $(BASE_DIR)/n3xx/dboards/rh/db_ifc/, \
+DbCore.vhd \
+DaughterboardRegs.vhd \
+ClockingRegs.vhd \
+PkgRhPersonality.vhd \
+PkgDaughterboardRegMap.vhd \
+PkgClockingRegMap.vhd \
+PkgJesdConfig.vhd \
+PkgAdcDacInterfaceTypes.vhd \
+RadioClocking.vhd \
+Jesd204bXcvrCore.edf \
+))
+
+RHODIUM_TOP_SRCS = $(abspath $(addprefix $(BASE_DIR)/n3xx/dboards/rh/, \
+n3xx.v \
+))
+
+RHODIUM_DB_CLOCKS_XDC = $(abspath $(addprefix $(BASE_DIR)/n3xx/dboards/rh/, \
+db_clocks.xdc \
+))
+
+RHODIUM_DB_XDC = $(abspath $(addprefix $(BASE_DIR)/n3xx/dboards/rh/, \
+db_pins.xdc \
+db_timing.xdc \
+))