diff options
Diffstat (limited to 'fpga/usrp3/top/e320/e320.v')
| -rw-r--r-- | fpga/usrp3/top/e320/e320.v | 21 |
1 files changed, 19 insertions, 2 deletions
diff --git a/fpga/usrp3/top/e320/e320.v b/fpga/usrp3/top/e320/e320.v index 501f6a06d..f16d1877f 100644 --- a/fpga/usrp3/top/e320/e320.v +++ b/fpga/usrp3/top/e320/e320.v @@ -175,6 +175,22 @@ module e320 ( ); + // Include the RFNoC image core header file + `ifdef RFNOC_IMAGE_CORE_HDR + `include `"`RFNOC_IMAGE_CORE_HDR`" + `else + ERROR_RFNOC_IMAGE_CORE_HDR_not_defined(); + `define CHDR_WIDTH 64 + `define RFNOC_PROTOVER { 8'd1, 8'd0 } + `endif + localparam CHDR_W = `CHDR_WIDTH; + localparam RFNOC_PROTOVER = `RFNOC_PROTOVER; + + // This USRP currently only supports 64-bit CHDR width + if (CHDR_W != 64) begin : gen_chdr_w_error + CHDR_W_must_be_64_for_this_USRP(); + end + `ifdef SFP_1GBE parameter PROTOCOL = "1GbE"; parameter MDIO_EN = 1'b1; @@ -207,7 +223,6 @@ module e320 ( localparam NUM_CHANNELS_PER_RADIO = 2; localparam NUM_DBOARDS = 1; localparam NUM_CHANNELS = NUM_RADIOS * NUM_CHANNELS_PER_RADIO; - localparam [15:0] RFNOC_PROTOVER = {8'd1, 8'd0}; // Clocks wire xgige_clk156; @@ -1690,7 +1705,9 @@ module e320 ( .NUM_CHANNELS(NUM_CHANNELS), .NUM_DBOARDS(NUM_DBOARDS), .FP_GPIO_WIDTH(FP_GPIO_WIDTH), - .DB_GPIO_WIDTH(DB_GPIO_WIDTH) + .DB_GPIO_WIDTH(DB_GPIO_WIDTH), + .CHDR_W(CHDR_W), + .RFNOC_PROTOVER(RFNOC_PROTOVER) ) e320_core_i ( //Clocks and resets |