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-rw-r--r--fpga/usrp3/top/e31x/ip/e31x_ps_bd/Makefile.inc35
1 files changed, 35 insertions, 0 deletions
diff --git a/fpga/usrp3/top/e31x/ip/e31x_ps_bd/Makefile.inc b/fpga/usrp3/top/e31x/ip/e31x_ps_bd/Makefile.inc
new file mode 100644
index 000000000..d70c96edd
--- /dev/null
+++ b/fpga/usrp3/top/e31x/ip/e31x_ps_bd/Makefile.inc
@@ -0,0 +1,35 @@
+#
+# Copyright 2018 Ettus Research
+#
+
+include $(TOOLS_DIR)/make/viv_ip_builder.mak
+include $(LIB_DIR)/rfnoc/utils/Makefile.srcs
+
+IP_E31X_PS_ORIG_SRCS = $(addprefix $(IP_DIR)/e31x_ps_bd/, \
+e31x_ps_bd.tcl \
+chdr_dma_rx.tcl \
+chdr_dma_tx.tcl \
+chdr_dma_frame_size.tcl \
+chdr_dma_top.tcl \
+)
+
+IP_E31X_PS_BDTCL_SRCS = $(addprefix $(IP_BUILD_DIR)/e31x_ps_bd/, \
+e31x_ps_bd.tcl \
+chdr_dma_rx.tcl \
+chdr_dma_tx.tcl \
+chdr_dma_frame_size.tcl \
+chdr_dma_top.tcl \
+)
+
+IP_E31X_PS_HDL_SRCS = $(RFNOC_UTIL_SRCS)
+
+IP_E31X_PS_BD_SRCS = $(IP_BUILD_DIR)/e31x_ps_bd/e31x_ps_bd/e31x_ps_bd.bd
+
+BD_E31X_PS_BD_OUTS = $(addprefix $(IP_BUILD_DIR)/e31x_ps_bd/, \
+e31x_ps_bd.bd.out \
+e31x_ps_bd/e31x_ps_bd_ooc.xdc \
+)
+
+$(IP_E31X_PS_BD_SRCS) $(BD_E31X_PS_BD_OUTS) $(IP_E31X_PS_BDTCL_SRCS): $(IP_E31X_PS_ORIG_SRCS) $(IP_E31X_PS_HDL_SRCS)
+ $(call BUILD_VIVADO_BDTCL,e31x_ps_bd,$(ARCH),$(PART_ID),$(IP_DIR),$(IP_BUILD_DIR),$(LIB_DIR)/vivado_ipi,$(IP_E31X_PS_HDL_SRCS))
+