diff options
Diffstat (limited to 'fpga/usrp3/tools/scripts')
| -rwxr-xr-x | fpga/usrp3/tools/scripts/launch_vivado.py | 9 | ||||
| -rw-r--r-- | fpga/usrp3/tools/scripts/setupenv_base.sh | 8 | ||||
| -rw-r--r-- | fpga/usrp3/tools/scripts/viv_gen_ip_makefile.py | 15 | ||||
| -rw-r--r-- | fpga/usrp3/tools/scripts/viv_gen_part_id.py | 7 | ||||
| -rw-r--r-- | fpga/usrp3/tools/scripts/viv_ip_xci_editor.py | 15 | ||||
| -rwxr-xr-x | fpga/usrp3/tools/scripts/xil_bitfile_parser.py | 29 |
6 files changed, 40 insertions, 43 deletions
diff --git a/fpga/usrp3/tools/scripts/launch_vivado.py b/fpga/usrp3/tools/scripts/launch_vivado.py index 01774bef3..f9cca2014 100755 --- a/fpga/usrp3/tools/scripts/launch_vivado.py +++ b/fpga/usrp3/tools/scripts/launch_vivado.py @@ -1,4 +1,4 @@ -#!/usr/bin/env python +#!/usr/bin/env python3 # # Notice: Some parts of this file were copied from PyBOMBS, which has a # different copyright, and is highlighted appropriately. The following @@ -24,7 +24,6 @@ Run Vivado builds """ -from __future__ import print_function import os import sys import re @@ -34,10 +33,7 @@ import time import argparse import subprocess import threading -try: - from Queue import Queue, Empty -except ImportError: - from queue import Queue, Empty # Py3k +from queue import Queue, Empty READ_TIMEOUT = 0.1 # s @@ -472,4 +468,3 @@ def main(): if __name__ == "__main__": exit(not main()) - diff --git a/fpga/usrp3/tools/scripts/setupenv_base.sh b/fpga/usrp3/tools/scripts/setupenv_base.sh index 5919b3aa8..8a82d83ea 100644 --- a/fpga/usrp3/tools/scripts/setupenv_base.sh +++ b/fpga/usrp3/tools/scripts/setupenv_base.sh @@ -338,7 +338,7 @@ function viv_create_ip { $VIVADO_EXEC -mode gui -source $(resolve_viv_path $VIV_IP_UTILS) -nolog -nojournal -tclargs create $part_name $ip_name $(resolve_viv_path $ip_dir) $ip_vlnv echo "Generating Makefile..." - python $REPO_BASE_PATH/tools/scripts/viv_gen_ip_makefile.py --ip_name=$ip_name --dest=$ip_dir/$ip_name + python3 $REPO_BASE_PATH/tools/scripts/viv_gen_ip_makefile.py --ip_name=$ip_name --dest=$ip_dir/$ip_name echo "Done generating IP in $ip_dir/$ip_name" } @@ -352,7 +352,7 @@ function viv_modify_ip { fi xci_path=$(readlink -f $1) - part_name=$(python $REPO_BASE_PATH/tools/scripts/viv_ip_xci_editor.py read_part $xci_path) + part_name=$(python3 $REPO_BASE_PATH/tools/scripts/viv_ip_xci_editor.py read_part $xci_path) if [[ -z $part_name ]]; then echo "ERROR: Invalid part name $part_name. XCI parse error." return 1 @@ -446,7 +446,7 @@ function viv_upgrade_ip { for xci_path in $xci_files; do if [[ -f $xci_path ]]; then echo "Upgrading $xci_path..." - part_name=$(python $REPO_BASE_PATH/tools/scripts/viv_ip_xci_editor.py read_part $xci_path) + part_name=$(python3 $REPO_BASE_PATH/tools/scripts/viv_ip_xci_editor.py read_part $xci_path) $VIVADO_EXEC -mode batch -source $(resolve_viv_path $VIV_IP_UTILS) -nolog -nojournal -tclargs upgrade $part_name $(resolve_viv_path $xci_path) | grep -v -E '(^$|^#|\*\*)' test ${PIPESTATUS[0]} -eq 0 else @@ -494,7 +494,7 @@ function probe_bitfile { echo "- <Bitfile Path>: Path to a .bit FPGA configuration file" return 1 fi - python $REPO_BASE_PATH/tools/scripts/xil_bitfile_parser.py --info $1 + python3 $REPO_BASE_PATH/tools/scripts/xil_bitfile_parser.py --info $1 } echo diff --git a/fpga/usrp3/tools/scripts/viv_gen_ip_makefile.py b/fpga/usrp3/tools/scripts/viv_gen_ip_makefile.py index 87572e86e..dd82e086e 100644 --- a/fpga/usrp3/tools/scripts/viv_gen_ip_makefile.py +++ b/fpga/usrp3/tools/scripts/viv_gen_ip_makefile.py @@ -1,7 +1,7 @@ -#! /usr/bin/python +#! /usr/bin/env python3 -import sys, os -import collections +import sys +import os import argparse import datetime @@ -10,7 +10,8 @@ def get_options(): parser = argparse.ArgumentParser(description='Create a Makefile for Xilinx IP.') parser.add_argument('--ip_name', type=str, default=None, help='Name for the IP core') parser.add_argument('--dest', type=str, default=None, help='Destination directory') - parser.add_argument('--copright_auth', type=str, default='Ettus Research', help='Copyright author') + parser.add_argument('--copright_auth', + type=str, default='Ettus Research', help='Copyright author') args = parser.parse_args() if not args.ip_name: print('ERROR: Please specify a name for the IP core\n') @@ -39,13 +40,13 @@ $({ip_srcs_var}) $({ip_outs_var}) : $(IP_DIR)/{ip_name}/{ip_name}.xci """ def main(): - args = get_options(); - + args = get_options() transform = {} transform['ip_name'] = args.ip_name transform['ip_srcs_var'] = 'IP_' + args.ip_name.upper() + '_SRCS' transform['ip_outs_var'] = 'IP_' + args.ip_name.upper() + '_OUTS' - transform['copyright'] = 'Copyright ' + str(datetime.datetime.now().year) + ' ' + args.copright_auth + transform['copyright'] = 'Copyright {} {}'.format( + datetime.datetime.now().year, args.copright_auth) with open(os.path.join(args.dest, 'Makefile.inc'), 'w') as mak_file: mak_file.write(g_makefile_template.format(**transform)) diff --git a/fpga/usrp3/tools/scripts/viv_gen_part_id.py b/fpga/usrp3/tools/scripts/viv_gen_part_id.py index b82c146aa..dc014aac2 100644 --- a/fpga/usrp3/tools/scripts/viv_gen_part_id.py +++ b/fpga/usrp3/tools/scripts/viv_gen_part_id.py @@ -1,8 +1,7 @@ -#!/usr/bin/python +#!/usr/bin/env python3 import argparse -import os, sys -import re +import sys # Parse command line options def get_options(): @@ -21,7 +20,7 @@ def main(): target_tok = args.target.split('/') if len(target_tok) < 4: print('ERROR: Invalid target format. Must be <arch>/<device>/<package>/<speedgrade>[/<temperaturegrade>[/<silicon_revision>]]') - print('ERROR: Parsed only ' + str(len(target_tok)) + ' tokens') + print('ERROR: Parsed only ' + str(len(target_tok)) + ' tokens') sys.exit(1) if target_tok[0] in ['artix7', 'kintex7', 'zynq', 'spartan7', 'virtex7']: print('' + target_tok[1] + target_tok[2] + target_tok[3]) diff --git a/fpga/usrp3/tools/scripts/viv_ip_xci_editor.py b/fpga/usrp3/tools/scripts/viv_ip_xci_editor.py index 1f5ddf2c5..b749b76da 100644 --- a/fpga/usrp3/tools/scripts/viv_ip_xci_editor.py +++ b/fpga/usrp3/tools/scripts/viv_ip_xci_editor.py @@ -1,7 +1,8 @@ -#!/usr/bin/python +#!/usr/bin/env python3 import argparse -import os, sys +import os +import sys import re # Parse command line options @@ -20,7 +21,7 @@ def get_options(): print('ERROR: Please specify the location for the XCI file to operate on\n') parser.print_help() sys.exit(1) - if (not os.path.isfile(args.xci_filepath)): + if not os.path.isfile(args.xci_filepath): print('ERROR: XCI File ' + args.xci_filepath + ' could not be accessed or is not a file.\n') parser.print_help() sys.exit(1) @@ -59,7 +60,7 @@ def main(): print(xci_info['DEVICE'] + xci_info['PACKAGE'] + xci_info['SPEEDGRADE']) elif args.action == 'retarget': # Write a new XCI file with modified target info - if (not os.path.isdir(args.output_dir)): + if not os.path.isdir(args.output_dir): print('ERROR: IP Build directory ' + args.output_dir + ' could not be accessed or is not a directory.') sys.exit(1) if not args.target: @@ -76,16 +77,16 @@ def main(): replace_dict['TEMPERATURE_GRADE'] = target_tok[4] if len(target_tok) > 5: replace_dict['SILICON_REVISION'] = target_tok[5] - out_xci_filename = os.path.join(os.path.abspath(args.output_dir), os.path.basename(args.xci_filepath)) + out_xci_filename = os.path.join(os.path.abspath(args.output_dir), os.path.basename(args.xci_filepath)) with open(out_xci_filename, 'w') as out_file: for r_line in xci_lines: w_line = r_line - m = re.search(get_match_str('(' + '|'.join(replace_dict.keys()) + ')'), r_line) + m = re.search(get_match_str('(' + '|'.join(list(replace_dict.keys())) + ')'), r_line) if m is not None: w_line = m.group(1) + replace_dict[m.group(2)] + m.group(4) +'\n' else: - m = re.search(get_empty_match_str('(' + '|'.join(replace_dict.keys()) + ')'), r_line) + m = re.search(get_empty_match_str('(' + '|'.join(list(replace_dict.keys())) + ')'), r_line) if m is not None: w_line = m.group(1) + '>' + replace_dict[m.group(2)] + '</spirit:configurableElementValue>\n' out_file.write(w_line) diff --git a/fpga/usrp3/tools/scripts/xil_bitfile_parser.py b/fpga/usrp3/tools/scripts/xil_bitfile_parser.py index 7201bde17..cace9b4df 100755 --- a/fpga/usrp3/tools/scripts/xil_bitfile_parser.py +++ b/fpga/usrp3/tools/scripts/xil_bitfile_parser.py @@ -1,7 +1,8 @@ -#!/usr/bin/python +#!/usr/bin/env python3 import argparse -import os, sys +import os +import sys import struct import re @@ -13,7 +14,7 @@ def get_options(): parser.add_argument('--flip', action='store_true', default=False, help='Flip 32-bit endianess') parser.add_argument('--info', action='store_true', default=False, help='Print bitfile info') args = parser.parse_args() - if (not os.path.isfile(args.bitfile)): + if not os.path.isfile(args.bitfile): print('ERROR: Bitfile ' + args.bitfile + ' could not be accessed or is not a file.\n') parser.print_help() sys.exit(1) @@ -52,9 +53,9 @@ def parse_bitfile(bitfile_bytes): def flip32(data): sl = struct.Struct('<I') sb = struct.Struct('>I') - b = buffer(data) + b = memoryview(data) d = bytearray(len(data)) - for offset in xrange(0, len(data), 4): + for offset in range(0, len(data), 4): sb.pack_into(d, offset, sl.unpack_from(b, offset)[0]) return d @@ -67,18 +68,18 @@ def main(): if args.info: m = re.search('(.+);UserID=(.+);COMPRESS=(.+);Version=(.+)', header['design_name']) if m: - print 'Design Name: ' + m.group(1) - print 'User ID: ' + m.group(2) - print 'Compression: ' + m.group(3) - print 'Vivado Version: ' + m.group(4) + print('Design Name: ' + m.group(1)) + print('User ID: ' + m.group(2)) + print('Compression: ' + m.group(3)) + print('Vivado Version: ' + m.group(4)) else: - print 'Design Name: ' + header['design_name'] - print 'Part Name: ' + header['part_name'] - print 'Datestamp: ' + header['date'] + ' ' + header['time'] - print 'Bitstream Size: ' + str(header['bitstream_len']) + print('Design Name: ' + header['design_name']) + print('Part Name: ' + header['part_name']) + print('Datestamp: ' + header['date'] + ' ' + header['time']) + print('Bitstream Size: ' + str(header['bitstream_len'])) # Write a bin file if args.bin_out: open(args.bin_out, 'wb').write(flip32(data) if args.flip else data) if __name__ == '__main__': - main()
\ No newline at end of file + main() |