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diff --git a/fpga/usrp3/sim/axi_crossbar/sim_2x2/run_isim b/fpga/usrp3/sim/axi_crossbar/sim_2x2/run_isim
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+++ b/fpga/usrp3/sim/axi_crossbar/sim_2x2/run_isim
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+vlogcomp -work work ${XILINX}/verilog/src/glbl.v
+vlogcomp -i ../.. -work work ../../../lib/control/axi_crossbar_tb.v
+vlogcomp -work work ../../../lib/control/axi_crossbar.v
+vlogcomp -work work ../../../lib/control/axi_slave_mux.v
+vlogcomp -work work ../../../lib/control/axi_forwarding_cam.v
+vlogcomp -work work ../../../lib/control/setting_reg.v
+vlogcomp -work work ../../../lib/fifo/monitor_axi_fifo.v
+vlogcomp -work work ../../../lib/fifo/axi_fifo_short.v
+
+
+
+fuse work.axi_crossbar_tb work.glbl -L unisims_ver -L xilinxcorelib_ver -o axi_crossbar_tb.exe
+
+# run the simulation scrip
+./axi_crossbar_tb.exe -gui #-tclbatch simcmds.tcl