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-rw-r--r--fpga/usrp3/lib/vivado_ipi/axi_dmac/component.xml4107
1 files changed, 4107 insertions, 0 deletions
diff --git a/fpga/usrp3/lib/vivado_ipi/axi_dmac/component.xml b/fpga/usrp3/lib/vivado_ipi/axi_dmac/component.xml
new file mode 100644
index 000000000..a3626529e
--- /dev/null
+++ b/fpga/usrp3/lib/vivado_ipi/axi_dmac/component.xml
@@ -0,0 +1,4107 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<spirit:component xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+ <spirit:vendor>analog.com</spirit:vendor>
+ <spirit:library>user</spirit:library>
+ <spirit:name>axi_dmac</spirit:name>
+ <spirit:version>1.0</spirit:version>
+ <spirit:busInterfaces>
+ <spirit:busInterface>
+ <spirit:name>s_axi</spirit:name>
+ <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
+ <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_rtl" spirit:version="1.0"/>
+ <spirit:slave>
+ <spirit:memoryMapRef spirit:memoryMapRef="s_axi"/>
+ </spirit:slave>
+ <spirit:portMaps>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>AWADDR</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_awaddr</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>AWPROT</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_awprot</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>AWVALID</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_awvalid</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>AWREADY</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_awready</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>WDATA</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_wdata</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>WSTRB</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_wstrb</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>WVALID</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_wvalid</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>WREADY</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_wready</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>BRESP</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_bresp</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>BVALID</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_bvalid</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>BREADY</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_bready</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>ARADDR</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_araddr</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>ARPROT</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_arprot</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>ARVALID</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_arvalid</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>ARREADY</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_arready</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>RDATA</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_rdata</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>RRESP</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_rresp</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>RVALID</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_rvalid</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>RREADY</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_rready</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ </spirit:portMaps>
+ </spirit:busInterface>
+ <spirit:busInterface>
+ <spirit:name>s_axi_aclk</spirit:name>
+ <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
+ <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
+ <spirit:slave/>
+ <spirit:portMaps>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>CLK</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_aclk</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ </spirit:portMaps>
+ <spirit:parameters>
+ <spirit:parameter>
+ <spirit:name>ASSOCIATED_BUSIF</spirit:name>
+ <spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_ACLK.ASSOCIATED_BUSIF">s_axi</spirit:value>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>ASSOCIATED_RESET</spirit:name>
+ <spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_ACLK.ASSOCIATED_RESET">s_axi_aresetn</spirit:value>
+ </spirit:parameter>
+ </spirit:parameters>
+ </spirit:busInterface>
+ <spirit:busInterface>
+ <spirit:name>s_axi_aresetn</spirit:name>
+ <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset" spirit:version="1.0"/>
+ <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset_rtl" spirit:version="1.0"/>
+ <spirit:slave/>
+ <spirit:portMaps>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>RST</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_aresetn</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ </spirit:portMaps>
+ <spirit:parameters>
+ <spirit:parameter>
+ <spirit:name>POLARITY</spirit:name>
+ <spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_ARESETN.POLARITY" spirit:choiceRef="choice_list_74b5137e">ACTIVE_LOW</spirit:value>
+ </spirit:parameter>
+ </spirit:parameters>
+ </spirit:busInterface>
+ <spirit:busInterface>
+ <spirit:name>m_dest_axi</spirit:name>
+ <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
+ <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_rtl" spirit:version="1.0"/>
+ <spirit:master>
+ <spirit:addressSpaceRef spirit:addressSpaceRef="m_dest_axi"/>
+ </spirit:master>
+ <spirit:portMaps>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>AWADDR</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_dest_axi_awaddr</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>AWLEN</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_dest_axi_awlen</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>AWSIZE</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_dest_axi_awsize</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>AWBURST</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_dest_axi_awburst</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>AWCACHE</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_dest_axi_awcache</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>AWPROT</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_dest_axi_awprot</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>AWVALID</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_dest_axi_awvalid</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>AWREADY</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_dest_axi_awready</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>WDATA</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_dest_axi_wdata</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>WSTRB</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_dest_axi_wstrb</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>WLAST</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_dest_axi_wlast</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>WVALID</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_dest_axi_wvalid</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>WREADY</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_dest_axi_wready</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>BRESP</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_dest_axi_bresp</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>BVALID</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_dest_axi_bvalid</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>BREADY</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_dest_axi_bready</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>ARADDR</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_dest_axi_araddr</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>ARLEN</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_dest_axi_arlen</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>ARSIZE</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_dest_axi_arsize</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>ARBURST</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_dest_axi_arburst</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>ARCACHE</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_dest_axi_arcache</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>ARPROT</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_dest_axi_arprot</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>ARVALID</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_dest_axi_arvalid</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>ARREADY</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_dest_axi_arready</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>RDATA</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_dest_axi_rdata</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>RRESP</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_dest_axi_rresp</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>RVALID</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_dest_axi_rvalid</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>RREADY</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_dest_axi_rready</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ </spirit:portMaps>
+ <spirit:parameters>
+ <spirit:parameter>
+ <spirit:name>SUPPORTS_NARROW_BURST</spirit:name>
+ <spirit:value spirit:id="BUSIFPARAM_VALUE.M_DEST_AXI.SUPPORTS_NARROW_BURST">0</spirit:value>
+ </spirit:parameter>
+ </spirit:parameters>
+ <spirit:vendorExtensions>
+ <xilinx:busInterfaceInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.m_dest_axi" xilinx:dependency="(spirit:decode(id(&apos;MODELPARAM_VALUE.DMA_TYPE_DEST&apos;)) = 0)">true</xilinx:isEnabled>
+ </xilinx:enablement>
+ </xilinx:busInterfaceInfo>
+ </spirit:vendorExtensions>
+ </spirit:busInterface>
+ <spirit:busInterface>
+ <spirit:name>m_src_axi</spirit:name>
+ <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
+ <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_rtl" spirit:version="1.0"/>
+ <spirit:master>
+ <spirit:addressSpaceRef spirit:addressSpaceRef="m_src_axi"/>
+ </spirit:master>
+ <spirit:portMaps>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>AWADDR</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_src_axi_awaddr</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>AWLEN</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_src_axi_awlen</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>AWSIZE</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_src_axi_awsize</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>AWBURST</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_src_axi_awburst</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>AWCACHE</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_src_axi_awcache</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>AWPROT</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_src_axi_awprot</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>AWVALID</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_src_axi_awvalid</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>AWREADY</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_src_axi_awready</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>WDATA</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_src_axi_wdata</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>WSTRB</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_src_axi_wstrb</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>WLAST</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_src_axi_wlast</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>WVALID</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_src_axi_wvalid</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>WREADY</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_src_axi_wready</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>BRESP</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_src_axi_bresp</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>BVALID</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_src_axi_bvalid</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>BREADY</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_src_axi_bready</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>ARADDR</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_src_axi_araddr</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>ARLEN</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_src_axi_arlen</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>ARSIZE</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_src_axi_arsize</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>ARBURST</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>m_src_axi_arburst</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>ARCACHE</spirit:name>
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+ <spirit:name>ID</spirit:name>
+ <spirit:displayName>Core ID</spirit:displayName>
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+ <spirit:name>DMA_DATA_WIDTH_SRC</spirit:name>
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+ <spirit:name>DMA_DATA_WIDTH_DEST</spirit:name>
+ <spirit:displayName>Bus Width</spirit:displayName>
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+ <spirit:parameter>
+ <spirit:name>DMA_LENGTH_WIDTH</spirit:name>
+ <spirit:displayName>DMA Transfer Length Register Width</spirit:displayName>
+ <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.DMA_LENGTH_WIDTH" spirit:minimum="8" spirit:maximum="32" spirit:rangeType="long">24</spirit:value>
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+ <spirit:parameter>
+ <spirit:name>DMA_2D_TRANSFER</spirit:name>
+ <spirit:displayName>2D Transfer Support</spirit:displayName>
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+ <spirit:parameter>
+ <spirit:name>ASYNC_CLK_REQ_SRC</spirit:name>
+ <spirit:displayName>Request and Source Clock Asynchronous</spirit:displayName>
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+ <spirit:parameter>
+ <spirit:name>ASYNC_CLK_SRC_DEST</spirit:name>
+ <spirit:displayName>Source and Destination Clock Asynchronous</spirit:displayName>
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+ <spirit:name>ASYNC_CLK_DEST_REQ</spirit:name>
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+ <spirit:name>AXI_SLICE_DEST</spirit:name>
+ <spirit:displayName>Insert Register Slice</spirit:displayName>
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+ <spirit:name>AXI_SLICE_SRC</spirit:name>
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+ <spirit:parameter>
+ <spirit:name>CYCLIC</spirit:name>
+ <spirit:displayName>Cyclic Transfer Support</spirit:displayName>
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+ <spirit:parameter>
+ <spirit:name>DMA_AXI_PROTOCOL_DEST</spirit:name>
+ <spirit:displayName>AXI Protocol</spirit:displayName>
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+ <spirit:name>DMA_AXI_PROTOCOL_SRC</spirit:name>
+ <spirit:displayName>AXI Protocol</spirit:displayName>
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+ <spirit:name>FIFO_SIZE</spirit:name>
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