diff options
Diffstat (limited to 'fpga/usrp3/lib/sim/dsp/duc_chain_x300')
3 files changed, 30 insertions, 0 deletions
diff --git a/fpga/usrp3/lib/sim/dsp/duc_chain_x300/dctest/.gitignore b/fpga/usrp3/lib/sim/dsp/duc_chain_x300/dctest/.gitignore new file mode 100644 index 000000000..7826d75e2 --- /dev/null +++ b/fpga/usrp3/lib/sim/dsp/duc_chain_x300/dctest/.gitignore @@ -0,0 +1,4 @@ +fuse* +isim* +*.exe +*.wcfg diff --git a/fpga/usrp3/lib/sim/dsp/duc_chain_x300/dctest/run_isim b/fpga/usrp3/lib/sim/dsp/duc_chain_x300/dctest/run_isim new file mode 100755 index 000000000..0672e32a6 --- /dev/null +++ b/fpga/usrp3/lib/sim/dsp/duc_chain_x300/dctest/run_isim @@ -0,0 +1,17 @@ +rm -rf fuse* *.exe isim +vlogcomp -work work ${XILINX}/verilog/src/glbl.v +vlogcomp -work work --sourcelibext .v \ + --sourcelibdir ../../../lib/dsp \ + --sourcelibdir ../../../lib/control \ + --sourcelibdir ../../../top/x300/coregen_dsp \ + --sourcelibdir ${XILINX}/verilog/src/unimacro \ + ../../../lib/dsp/duc_chain_x300_tb.v + + + +fuse work.duc_chain_x300_tb work.glbl -L unisims_ver -L xilinxcorelib_ver -o duc_chain_x300_tb.exe + +# run the simulation scrip +./duc_chain_x300_tb.exe -tclbatch simcmds.tcl # -gui + + diff --git a/fpga/usrp3/lib/sim/dsp/duc_chain_x300/dctest/simcmds.tcl b/fpga/usrp3/lib/sim/dsp/duc_chain_x300/dctest/simcmds.tcl new file mode 100755 index 000000000..3dcfd3eaf --- /dev/null +++ b/fpga/usrp3/lib/sim/dsp/duc_chain_x300/dctest/simcmds.tcl @@ -0,0 +1,9 @@ +# file: simcmds.tcl + +# create the simulation script +#vcd dumpfile isim.vcd +#vcd dumpvars -m /bus_clk_gen_tb -l 0 +#wave add / +run 1 s +quit + |