diff options
Diffstat (limited to 'fpga/usrp3/lib/sim/dsp/ddc_chain/run_isim')
| -rwxr-xr-x | fpga/usrp3/lib/sim/dsp/ddc_chain/run_isim | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/fpga/usrp3/lib/sim/dsp/ddc_chain/run_isim b/fpga/usrp3/lib/sim/dsp/ddc_chain/run_isim new file mode 100755 index 000000000..d43ccf230 --- /dev/null +++ b/fpga/usrp3/lib/sim/dsp/ddc_chain/run_isim @@ -0,0 +1,18 @@ +rm -rf fuse* *.exe isim +vlogcomp -work work ${XILINX}/verilog/src/glbl.v +vlogcomp -work work --sourcelibext .v \ + --sourcelibdir ../../.. \ + --sourcelibdir ../../../../control \ + --sourcelibdir ../../../../../top/b200/coregen_dsp \ + --sourcelibdir ../../../../../top/b200/coregen \ + --sourcelibdir ${XILINX}/verilog/src/unimacro \ + ddc_chain_tb.v + + + +fuse work.ddc_chain_tb work.glbl -L unisims_ver -L xilinxcorelib_ver -o testbench.exe + +# run the simulation script +./testbench.exe #-gui #-tclbatch simcmds.tcl + + |