diff options
Diffstat (limited to 'fpga/usrp3/lib/sim/axi_dram_fifo/run_isim')
| -rwxr-xr-x | fpga/usrp3/lib/sim/axi_dram_fifo/run_isim | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/fpga/usrp3/lib/sim/axi_dram_fifo/run_isim b/fpga/usrp3/lib/sim/axi_dram_fifo/run_isim new file mode 100755 index 000000000..5d32efcdd --- /dev/null +++ b/fpga/usrp3/lib/sim/axi_dram_fifo/run_isim @@ -0,0 +1,16 @@ +vlogcomp -work work ${XILINX}/verilog/src/glbl.v +#vlogcomp --define SIM_SCRIPT=true --define ISIM=true -work work ../../../packet_proc/source_flow_control_tb.v +vlogcomp -work work --sourcelibext .v \ + --sourcelibdir ../../axi \ + --sourcelibdir ../../fifo \ + --sourcelibdir ../../../top/b250/coregen \ + ../../axi/axi_dram_fifo_tb.v + + + +fuse work.axi_dram_fifo_tb work.glbl -L unisims_ver -L xilinxcorelib_ver -o axi_dram_fifo_tb.exe + +# run the simulation scrip +./axi_dram_fifo_tb.exe -gui #-tclbatch simcmds.tcl +#./source_flow_control_tb.exe + |