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-rw-r--r--fpga/usrp3/lib/sim/arm_deframer/Makefile1
-rw-r--r--fpga/usrp3/lib/sim/arm_deframer/arm_deframer_tb.sv2
2 files changed, 1 insertions, 2 deletions
diff --git a/fpga/usrp3/lib/sim/arm_deframer/Makefile b/fpga/usrp3/lib/sim/arm_deframer/Makefile
index 3075cf3cc..c278b3903 100644
--- a/fpga/usrp3/lib/sim/arm_deframer/Makefile
+++ b/fpga/usrp3/lib/sim/arm_deframer/Makefile
@@ -32,7 +32,6 @@ DESIGN_SRCS += $(abspath \
SIM_TOP = arm_deframer_tb
SIM_SRCS = $(abspath \
-$(SIM_PROTORFNOC_SRCS) \
$(RFNOC_SRCS) \
arm_deframer_tb.sv \
)
diff --git a/fpga/usrp3/lib/sim/arm_deframer/arm_deframer_tb.sv b/fpga/usrp3/lib/sim/arm_deframer/arm_deframer_tb.sv
index 4e252b5b4..5e879c3e4 100644
--- a/fpga/usrp3/lib/sim/arm_deframer/arm_deframer_tb.sv
+++ b/fpga/usrp3/lib/sim/arm_deframer/arm_deframer_tb.sv
@@ -14,8 +14,8 @@
`define NUM_TEST_CASES 3
`include "sim_axis_lib.svh"
`include "sim_exec_report.vh"
-`include "sim_rfnoc_lib.svh"
`include "sim_set_rb_lib.svh"
+`include "sim_clks_rsts.vh"
// NOTE: The tesbench is not self-checking
module arm_deframer_tb();