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-rw-r--r--fpga/usrp3/lib/rfnoc/sim/chdr_stream_endpoint_tb/chdr_stream_endpoint_tb.sv2
1 files changed, 2 insertions, 0 deletions
diff --git a/fpga/usrp3/lib/rfnoc/sim/chdr_stream_endpoint_tb/chdr_stream_endpoint_tb.sv b/fpga/usrp3/lib/rfnoc/sim/chdr_stream_endpoint_tb/chdr_stream_endpoint_tb.sv
index 0626ee447..34bf10707 100644
--- a/fpga/usrp3/lib/rfnoc/sim/chdr_stream_endpoint_tb/chdr_stream_endpoint_tb.sv
+++ b/fpga/usrp3/lib/rfnoc/sim/chdr_stream_endpoint_tb/chdr_stream_endpoint_tb.sv
@@ -45,6 +45,8 @@ module chdr_stream_endpoint_tb;
localparam [9:0] PORT_A = 10'd1;
localparam [9:0] PORT_B = 10'd2;
+ typedef ChdrData #(CHDR_W)::chdr_word_t chdr_word_t;
+
// ----------------------------------------
// DUT (and Crossbar) Instantiations
// ----------------------------------------