aboutsummaryrefslogtreecommitdiffstats
path: root/fpga/usrp3/lib/axi4s_sv/axi4s_fifo.sv
diff options
context:
space:
mode:
Diffstat (limited to 'fpga/usrp3/lib/axi4s_sv/axi4s_fifo.sv')
-rw-r--r--fpga/usrp3/lib/axi4s_sv/axi4s_fifo.sv4
1 files changed, 2 insertions, 2 deletions
diff --git a/fpga/usrp3/lib/axi4s_sv/axi4s_fifo.sv b/fpga/usrp3/lib/axi4s_sv/axi4s_fifo.sv
index 647e1dc1c..c3c71999d 100644
--- a/fpga/usrp3/lib/axi4s_sv/axi4s_fifo.sv
+++ b/fpga/usrp3/lib/axi4s_sv/axi4s_fifo.sv
@@ -16,8 +16,8 @@ module axi4s_fifo #(
) (
// Clock domain: i.clk (o.clk is unused)
input logic clear=1'b0,
- interface i, // AxiStreamIf or AxiStreamPacketIf
- interface o, // AxiStreamIf or AxiStreamPacketIf
+ interface.slave i, // AxiStreamIf or AxiStreamPacketIf
+ interface.master o, // AxiStreamIf or AxiStreamPacketIf
output logic [15:0] space,
output logic [15:0] occupied
);