diff options
Diffstat (limited to 'fpga/usrp2/opencores/spi/sim')
19 files changed, 130 insertions, 0 deletions
diff --git a/fpga/usrp2/opencores/spi/sim/CVS/Entries b/fpga/usrp2/opencores/spi/sim/CVS/Entries new file mode 100644 index 000000000..545533337 --- /dev/null +++ b/fpga/usrp2/opencores/spi/sim/CVS/Entries @@ -0,0 +1,2 @@ +D/rtl_sim//// +D/run//// diff --git a/fpga/usrp2/opencores/spi/sim/CVS/Repository b/fpga/usrp2/opencores/spi/sim/CVS/Repository new file mode 100644 index 000000000..9ec769309 --- /dev/null +++ b/fpga/usrp2/opencores/spi/sim/CVS/Repository @@ -0,0 +1 @@ +spi/sim diff --git a/fpga/usrp2/opencores/spi/sim/CVS/Root b/fpga/usrp2/opencores/spi/sim/CVS/Root new file mode 100644 index 000000000..44b2aa23b --- /dev/null +++ b/fpga/usrp2/opencores/spi/sim/CVS/Root @@ -0,0 +1 @@ +:pserver:anonymous@cvs.opencores.org:/cvsroot/anonymous diff --git a/fpga/usrp2/opencores/spi/sim/CVS/Template b/fpga/usrp2/opencores/spi/sim/CVS/Template new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/fpga/usrp2/opencores/spi/sim/CVS/Template diff --git a/fpga/usrp2/opencores/spi/sim/rtl_sim/CVS/Entries b/fpga/usrp2/opencores/spi/sim/rtl_sim/CVS/Entries new file mode 100644 index 000000000..8ab9f73a7 --- /dev/null +++ b/fpga/usrp2/opencores/spi/sim/rtl_sim/CVS/Entries @@ -0,0 +1 @@ +D/run//// diff --git a/fpga/usrp2/opencores/spi/sim/rtl_sim/CVS/Repository b/fpga/usrp2/opencores/spi/sim/rtl_sim/CVS/Repository new file mode 100644 index 000000000..c8c6a94c6 --- /dev/null +++ b/fpga/usrp2/opencores/spi/sim/rtl_sim/CVS/Repository @@ -0,0 +1 @@ +spi/sim/rtl_sim diff --git a/fpga/usrp2/opencores/spi/sim/rtl_sim/CVS/Root b/fpga/usrp2/opencores/spi/sim/rtl_sim/CVS/Root new file mode 100644 index 000000000..44b2aa23b --- /dev/null +++ b/fpga/usrp2/opencores/spi/sim/rtl_sim/CVS/Root @@ -0,0 +1 @@ +:pserver:anonymous@cvs.opencores.org:/cvsroot/anonymous diff --git a/fpga/usrp2/opencores/spi/sim/rtl_sim/CVS/Template b/fpga/usrp2/opencores/spi/sim/rtl_sim/CVS/Template new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/fpga/usrp2/opencores/spi/sim/rtl_sim/CVS/Template diff --git a/fpga/usrp2/opencores/spi/sim/rtl_sim/run/CVS/Entries b/fpga/usrp2/opencores/spi/sim/rtl_sim/run/CVS/Entries new file mode 100644 index 000000000..8947f64a0 --- /dev/null +++ b/fpga/usrp2/opencores/spi/sim/rtl_sim/run/CVS/Entries @@ -0,0 +1,4 @@ +/rtl.fl/1.1/Mon Mar 15 17:46:08 2004// +/run_sim/1.1/Mon Mar 15 17:46:08 2004// +/sim.fl/1.1/Mon Mar 15 17:46:08 2004// +D diff --git a/fpga/usrp2/opencores/spi/sim/rtl_sim/run/CVS/Repository b/fpga/usrp2/opencores/spi/sim/rtl_sim/run/CVS/Repository new file mode 100644 index 000000000..5200bb196 --- /dev/null +++ b/fpga/usrp2/opencores/spi/sim/rtl_sim/run/CVS/Repository @@ -0,0 +1 @@ +spi/sim/rtl_sim/run diff --git a/fpga/usrp2/opencores/spi/sim/rtl_sim/run/CVS/Root b/fpga/usrp2/opencores/spi/sim/rtl_sim/run/CVS/Root new file mode 100644 index 000000000..44b2aa23b --- /dev/null +++ b/fpga/usrp2/opencores/spi/sim/rtl_sim/run/CVS/Root @@ -0,0 +1 @@ +:pserver:anonymous@cvs.opencores.org:/cvsroot/anonymous diff --git a/fpga/usrp2/opencores/spi/sim/rtl_sim/run/CVS/Template b/fpga/usrp2/opencores/spi/sim/rtl_sim/run/CVS/Template new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/fpga/usrp2/opencores/spi/sim/rtl_sim/run/CVS/Template diff --git a/fpga/usrp2/opencores/spi/sim/rtl_sim/run/rtl.fl b/fpga/usrp2/opencores/spi/sim/rtl_sim/run/rtl.fl new file mode 100644 index 000000000..d84a0840d --- /dev/null +++ b/fpga/usrp2/opencores/spi/sim/rtl_sim/run/rtl.fl @@ -0,0 +1,3 @@ +spi_top.v +spi_clgen.v +spi_shift.v diff --git a/fpga/usrp2/opencores/spi/sim/rtl_sim/run/run_sim b/fpga/usrp2/opencores/spi/sim/rtl_sim/run/run_sim new file mode 100755 index 000000000..1b13a35b9 --- /dev/null +++ b/fpga/usrp2/opencores/spi/sim/rtl_sim/run/run_sim @@ -0,0 +1,108 @@ +#!/bin/csh -f + +set current_par = 0 +set output_waveform = 0 +while ( $current_par < $# ) + @ current_par = $current_par + 1 + case wave: + @ output_waveform = 1 + breaksw + default: + echo 'Unknown option "'$argv[$current_par]'"!' + exit + breaksw + endsw +end + +echo "TEST: spi" + +#echo "-CDSLIB ./cds.lib" > ncvlog.args +#echo "-HDLVAR ./hdl.var" >> ncvlog.args +echo "-MESSAGES" > ncvlog.args +echo "-INCDIR ../../../bench/verilog" >> ncvlog.args +echo "-INCDIR ../../../rtl/verilog" >> ncvlog.args +echo "-NOCOPYRIGHT" >> ncvlog.args +echo "-UPDATE" >> ncvlog.args +echo "-LOGFILE ncvlog.log" >> ncvlog.args + +foreach filename ( `cat ./rtl.fl` ) + echo "../../../rtl/verilog/"$filename >> ncvlog.args +end + +foreach filename ( `cat ./sim.fl` ) + echo "../../../bench/verilog/"$filename >> ncvlog.args +end + +ncvlog -f ncvlog.args +if ($status != 0) then + echo "STATUS: failed" + exit +endif + + +echo "-MESSAGES" > ncelab.args +echo "-NOCOPYRIGHT" >> ncelab.args +#echo "-CDSLIB ./cds.lib" >> ncelab.args +#echo "-HDLVAR ./hdl.var" >> ncelab.args +echo "-LOGFILE ncelab.log" >> ncelab.args +echo "-SNAPSHOT worklib.tb_spi_top:v" >> ncelab.args +echo "-NOTIMINGCHECKS" >> ncelab.args +echo "-ACCESS +RWC" >> ncelab.args +echo "tb_spi_top" >> ncelab.args + +ncelab -f ncelab.args +if ($status != 0) then + echo "STATUS: failed" + exit +endif + + +echo "-MESSAGES" > ncsim.args +echo "-NOCOPYRIGHT" >> ncsim.args +#echo "-CDSLIB ./cds.lib" >> ncsim.args +#echo "-HDLVAR ./hdl.var" >> ncsim.args +echo "-INPUT ncsim.tcl" >> ncsim.args +echo "-LOGFILE ncsim.log" >> ncsim.args +echo "worklib.tb_spi_top:v" >> ncsim.args + +if ( $output_waveform ) then + echo "database -open waves -shm -into ../out/wav" > ./ncsim.tcl + echo "probe -create -database waves -shm tb_spi_top -all -depth all" >> ./ncsim.tcl + echo "stop -create -time 25000000 -relative" >> ./ncsim.tcl + echo "run" >> ./ncsim.tcl +else + echo "stop -create -time 25000000 -relative" >> ./ncsim.tcl + echo "run" > ./ncsim.tcl +endif + +echo "exit" >> ncsim.tcl + +ncsim -LICQUEUE -f ./ncsim.args + +set exit_line_nb = `sed -n '/exit/=' < ./ncsim.log` + +set dead_line_nb = 0 + +if ( $exit_line_nb ) then + + @ dead_line_nb = $exit_line_nb - 1 + set exit_line=`sed -n $exit_line_nb's/exit/&/gp' < ./ncsim.log` + set dead_line=`sed -n $dead_line_nb's/report/&/gp' < ./ncsim.log` + + if ( "$dead_line" == "report (deaddead)" ) then + if ( "$exit_line" == "exit (00000000)" ) then + echo "STATUS: passed" #|tee -a ./run_sim.log 2>&1 + else + echo "STATUS: failed" #|tee -a ./run_sim.log 2>&1 + endif + else + echo "STATUS: failed" + endif + +endif + +exit + + + + diff --git a/fpga/usrp2/opencores/spi/sim/rtl_sim/run/sim.fl b/fpga/usrp2/opencores/spi/sim/rtl_sim/run/sim.fl new file mode 100644 index 000000000..283aad1f8 --- /dev/null +++ b/fpga/usrp2/opencores/spi/sim/rtl_sim/run/sim.fl @@ -0,0 +1,3 @@ +tb_spi_top.v +wb_master_model.v +spi_slave_model.v diff --git a/fpga/usrp2/opencores/spi/sim/run/CVS/Entries b/fpga/usrp2/opencores/spi/sim/run/CVS/Entries new file mode 100644 index 000000000..178481050 --- /dev/null +++ b/fpga/usrp2/opencores/spi/sim/run/CVS/Entries @@ -0,0 +1 @@ +D diff --git a/fpga/usrp2/opencores/spi/sim/run/CVS/Repository b/fpga/usrp2/opencores/spi/sim/run/CVS/Repository new file mode 100644 index 000000000..e8646e70d --- /dev/null +++ b/fpga/usrp2/opencores/spi/sim/run/CVS/Repository @@ -0,0 +1 @@ +spi/sim/run diff --git a/fpga/usrp2/opencores/spi/sim/run/CVS/Root b/fpga/usrp2/opencores/spi/sim/run/CVS/Root new file mode 100644 index 000000000..44b2aa23b --- /dev/null +++ b/fpga/usrp2/opencores/spi/sim/run/CVS/Root @@ -0,0 +1 @@ +:pserver:anonymous@cvs.opencores.org:/cvsroot/anonymous diff --git a/fpga/usrp2/opencores/spi/sim/run/CVS/Template b/fpga/usrp2/opencores/spi/sim/run/CVS/Template new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/fpga/usrp2/opencores/spi/sim/run/CVS/Template |