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1 files changed, 21 insertions, 0 deletions
diff --git a/fpga/usrp2/opencores/aemb/sim/iversim b/fpga/usrp2/opencores/aemb/sim/iversim
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+#!/bin/sh
+# $Id: iversim,v 1.5 2007/12/11 00:44:30 sybreon Exp $
+# $Log: iversim,v $
+# Revision 1.5 2007/12/11 00:44:30 sybreon
+# Modified for AEMB2
+#
+# Revision 1.4 2007/11/30 17:08:30 sybreon
+# Moved simulation kernel into code.
+#
+# Revision 1.3 2007/11/09 20:50:51 sybreon
+# Added log output to iverilog.log
+#
+# Revision 1.2 2007/11/05 10:59:31 sybreon
+# Added random seed for simulation.
+#
+# Revision 1.1 2007/03/09 17:41:55 sybreon
+# initial import
+#
+RANDOM=$(date +%s)
+echo "parameter randseed = $RANDOM;" > random.v
+iverilog $@ -DAEMBX_SIMULATION_KERNEL ../rtl/verilog/*.v && vvp -l iverilog.log a.out && rm a.out