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-rw-r--r--fpga/usrp2/fifo/fifo36_to_ll8.v1
1 files changed, 0 insertions, 1 deletions
diff --git a/fpga/usrp2/fifo/fifo36_to_ll8.v b/fpga/usrp2/fifo/fifo36_to_ll8.v
index 0dee1dfc6..9604d0e38 100644
--- a/fpga/usrp2/fifo/fifo36_to_ll8.v
+++ b/fpga/usrp2/fifo/fifo36_to_ll8.v
@@ -55,6 +55,5 @@ module fifo36_to_ll8
assign advance = ll_src_rdy & ll_dst_rdy;
assign f36_dst_rdy_o = advance & ((state==3)|ll_eof);
- assign debug = state;
endmodule // ll8_to_fifo36