diff options
| -rw-r--r-- | usrp2/simple_gemac/Makefile.srcs | 1 | ||||
| -rw-r--r-- | usrp2/simple_gemac/address_filter_promisc.v | 32 | ||||
| -rw-r--r-- | usrp2/simple_gemac/simple_gemac_rx.v | 10 | ||||
| -rw-r--r-- | usrp2/simple_gemac/simple_gemac_wb.v | 2 |
4 files changed, 40 insertions, 5 deletions
diff --git a/usrp2/simple_gemac/Makefile.srcs b/usrp2/simple_gemac/Makefile.srcs index 6480cd5a4..b82e64208 100644 --- a/usrp2/simple_gemac/Makefile.srcs +++ b/usrp2/simple_gemac/Makefile.srcs @@ -17,6 +17,7 @@ delay_line.v \ flow_ctrl_tx.v \ flow_ctrl_rx.v \ address_filter.v \ +address_filter_promisc.v \ ll8_to_txmac.v \ rxmac_to_ll8.v \ miim/eth_miim.v \ diff --git a/usrp2/simple_gemac/address_filter_promisc.v b/usrp2/simple_gemac/address_filter_promisc.v new file mode 100644 index 000000000..6047e7c93 --- /dev/null +++ b/usrp2/simple_gemac/address_filter_promisc.v @@ -0,0 +1,32 @@ + + +module address_filter_promisc + (input clk, + input reset, + input go, + input [7:0] data, + output match, + output done); + + reg [2:0] af_state; + + always @(posedge clk) + if(reset) + af_state <= 0; + else + if(go) + af_state <= (data[0] == 1'b0) ? 1 : 7; + else + case(af_state) + 1 : af_state <= 2; + 2 : af_state <= 3; + 3 : af_state <= 4; + 4 : af_state <= 5; + 5 : af_state <= 6; + 6, 7 : af_state <= 0; + endcase // case (af_state) + + assign match = (af_state==6); + assign done = (af_state==6)|(af_state==7); + +endmodule // address_filter_promisc diff --git a/usrp2/simple_gemac/simple_gemac_rx.v b/usrp2/simple_gemac/simple_gemac_rx.v index b02bb0758..32f517bb3 100644 --- a/usrp2/simple_gemac/simple_gemac_rx.v +++ b/usrp2/simple_gemac/simple_gemac_rx.v @@ -56,10 +56,10 @@ module simple_gemac_rx else rx_ack <= (rx_state == RX_GOODFRAME); - wire is_ucast, is_bcast, is_mcast, is_pause; - wire keep_packet = (pass_ucast & is_ucast) | (pass_mcast & is_mcast) | - (pass_bcast & is_bcast) | (pass_pause & is_pause) | pass_all; - + wire is_ucast, is_bcast, is_mcast, is_pause, is_any_ucast; + wire keep_packet = (pass_all & is_any_ucast) | (pass_ucast & is_ucast) | (pass_mcast & is_mcast) | + (pass_bcast & is_bcast) | (pass_pause & is_pause); + assign rx_data = rxd_del; assign rx_error = (rx_state == RX_ERROR); @@ -79,6 +79,8 @@ module simple_gemac_rx .address(48'hFFFF_FFFF_FFFF), .match(is_bcast), .done()); address_filter af_pause (.clk(rx_clk), .reset(reset), .go(go_filt), .data(rxd_d1), .address(48'h0180_c200_0001), .match(is_pause), .done()); + address_filter_promisc af_promisc (.clk(rx_clk), .reset(reset), .go(go_filt), .data(rxd_d1), + .match(is_any_ucast), .done()); always @(posedge rx_clk) go_filt <= (rx_state==RX_PREAMBLE) & (rxd_d1 == 8'hD5); diff --git a/usrp2/simple_gemac/simple_gemac_wb.v b/usrp2/simple_gemac/simple_gemac_wb.v index 6df277e3e..f4ecd7f08 100644 --- a/usrp2/simple_gemac/simple_gemac_wb.v +++ b/usrp2/simple_gemac/simple_gemac_wb.v @@ -41,7 +41,7 @@ module simple_gemac_wb wire [6:0] misc_settings; assign {pause_request_en, pass_ucast, pass_mcast, pass_bcast, pass_pause, pass_all, pause_respect_en} = misc_settings; - wb_reg #(.ADDR(0),.DEFAULT(7'b0111001)) + wb_reg #(.ADDR(0),.DEFAULT(7'b0111011)) wb_reg_settings (.clk(wb_clk), .rst(wb_rst), .adr(wb_adr[7:2]), .wr_acc(wr_acc), .dat_i(wb_dat_i), .dat_o(misc_settings) ); wb_reg #(.ADDR(1),.DEFAULT(0)) |