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-rw-r--r--host/docs/usrp_n3xx.dox3
-rw-r--r--mpm/python/usrp_mpm/periph_manager/n3xx.py5
2 files changed, 6 insertions, 2 deletions
diff --git a/host/docs/usrp_n3xx.dox b/host/docs/usrp_n3xx.dox
index 052f20ee9..18a8a023b 100644
--- a/host/docs/usrp_n3xx.dox
+++ b/host/docs/usrp_n3xx.dox
@@ -664,6 +664,9 @@ and time.
auto usrp = uhd::usrp::multi_usrp::make(
"type=n3xx,clock_source=external,time_source=external");
```
+To reduce phase noise, it may be necessary to power down the GPSDO when using
+an external reference. To do this, just add `enable_gps=False` to the
+configuration file in `/etc/uhd/mpm.conf` (see also \ref page_configfiles).
Note: When disabling the GPS with `enable_gps=0` in the configuration file, or
diff --git a/mpm/python/usrp_mpm/periph_manager/n3xx.py b/mpm/python/usrp_mpm/periph_manager/n3xx.py
index cdc58b8cc..2695dbfba 100644
--- a/mpm/python/usrp_mpm/periph_manager/n3xx.py
+++ b/mpm/python/usrp_mpm/periph_manager/n3xx.py
@@ -225,6 +225,7 @@ class n3xx(ZynqComponents, PeriphManagerBase):
# Init peripherals
# these peripherals are specific to mboard and
# need to configured before applying fpga overlay
+ args = self._update_default_args(args)
self._gpios = TCA6424(int(self.mboard_info['rev']))
self.log.trace("Enabling power of MGT156MHZ clk")
self._gpios.set("PWREN-CLK-MGT156MHz")
@@ -669,9 +670,9 @@ class n3xx(ZynqComponents, PeriphManagerBase):
self._gpios.set("CLK-MAINSEL-GPS")
else: # external
self._gpios.reset("CLK-MAINSEL-EX_B")
- self._gpios.reset("CLK-MAINSEL-GPS")
+ self._gpios.set("CLK-MAINSEL-GPS")
# SKY13350 needs to be in known state
- self._gpios.set("CLK-MAINSEL-25MHz")
+ self._gpios.reset("CLK-MAINSEL-25MHz")
self._clock_source = clock_source
self.log.debug("Reference clock source is: {}" \
.format(self._clock_source))