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authorMatt Ettus <matt@ettus.com>2011-04-14 14:42:40 -0700
committerMatt Ettus <matt@ettus.com>2011-05-26 17:31:22 -0700
commit37cffdd35ab72551696a8d36c16d501b6d502ff1 (patch)
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u1p: vita packet generator for testing purposes
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diff --git a/usrp2/vrt/vita_pkt_gen.v b/usrp2/vrt/vita_pkt_gen.v
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+
+
+module vita_pkt_gen
+ (input clk, input reset, input clear,
+ input [15:0] len,
+ output [35:0] data_o, output src_rdy_o, input dst_rdy_i);
+
+ reg [15:0] state;
+ reg [31:0] seq, data;
+
+ wire sof = (state == 0);
+ wire eof = (state == (len-1));
+ wire consume = src_rdy_o & dst_rdy_i;
+
+ assign src_rdy_o = 1;
+
+ always @(posedge clk)
+ if(reset | clear)
+ begin
+ state <= 0;
+ seq <= 0;
+ end
+ else
+ if(consume)
+ if(eof)
+ begin
+ state <= 0;
+ seq <= seq + 1;
+ end
+ else
+ state <= state + 1;
+
+ always @*
+ case(state)
+ 0 : data <= {24'h000,seq[3:0],len};
+ 1 : data <= seq;
+ default : data <= {~state,state};
+ endcase // case (state)
+
+ assign data_o = {2'b00, eof, sof, data};
+
+endmodule // vita_pkt_gen