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authorMatt Ettus <matt@ettus.com>2010-02-16 16:21:00 -0800
committerMatt Ettus <matt@ettus.com>2010-02-16 16:21:00 -0800
commit8e76952016272c9898776b6beb7a69f476d4707e (patch)
tree8efbf0a14f4c0d130c82cde11e82cfbe503ecf85 /usrp2/top
parent034eeacfe8d35b0e9733dd9183f1a9dbed78f347 (diff)
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block ram interface to GPMC
Diffstat (limited to 'usrp2/top')
-rw-r--r--usrp2/top/safe_u1e/safe_u1e.v8
1 files changed, 6 insertions, 2 deletions
diff --git a/usrp2/top/safe_u1e/safe_u1e.v b/usrp2/top/safe_u1e/safe_u1e.v
index ddd203cf9..dee9c6067 100644
--- a/usrp2/top/safe_u1e/safe_u1e.v
+++ b/usrp2/top/safe_u1e/safe_u1e.v
@@ -29,9 +29,13 @@ module safe_u1e
{ EM_D } };
wire EM_output_enable = (~EM_NOE & ~EM_NCS4);
- wire [15:0] EM_D_out = 16'hBEEF;
- wire [15:0] EM_D_in = EM_D;
+ wire [15:0] EM_D_out;
assign EM_D = EM_output_enable ? EM_D_out : 16'bz;
+
+ ram_2port #(.DWIDTH(16), .AWIDTH(10)) ram_2port
+ (.clka(clk_fpga), .ena(~EM_NCS4), .wea(~EM_NWE), .addra(EM_A), .dia(EM_D), .doa(EM_D_out),
+ .clkb(clk_fpga), .enb(0), .web(0), .addrb(0), .dib(0), .dob());
+
endmodule // safe_u2plus