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| author | Matt Ettus <matt@ettus.com> | 2010-12-15 17:37:58 -0800 |
|---|---|---|
| committer | Matt Ettus <matt@ettus.com> | 2010-12-15 17:37:58 -0800 |
| commit | 54588404b0e168d42ca963a282c61fa137612a63 (patch) | |
| tree | e538beb9b00e971dc746e37908e8cd2e708e34a5 /usrp2/top | |
| parent | 21c3765da33652ec186e230d2aabc52625e32d7f (diff) | |
| download | uhd-54588404b0e168d42ca963a282c61fa137612a63.tar.gz uhd-54588404b0e168d42ca963a282c61fa137612a63.tar.bz2 uhd-54588404b0e168d42ca963a282c61fa137612a63.zip | |
generate port number headers in the dsp error units
Diffstat (limited to 'usrp2/top')
| -rw-r--r-- | usrp2/top/u2_rev3/u2_core.v | 3 | ||||
| -rw-r--r-- | usrp2/top/u2plus/u2plus_core.v | 3 |
2 files changed, 4 insertions, 2 deletions
diff --git a/usrp2/top/u2_rev3/u2_core.v b/usrp2/top/u2_rev3/u2_core.v index 30b47b818..41e308723 100644 --- a/usrp2/top/u2_rev3/u2_core.v +++ b/usrp2/top/u2_rev3/u2_core.v @@ -691,7 +691,8 @@ module u2_core vita_tx_chain #(.BASE_CTRL(SR_TX_CTRL), .BASE_DSP(SR_TX_DSP), .REPORT_ERROR(1), .DO_FLOW_CONTROL(1), - .PROT_ENG_FLAGS(1), .USE_TRANS_HEADER(1)) + .PROT_ENG_FLAGS(1), .USE_TRANS_HEADER(1), + .DSP_NUMBER(0)) vita_tx_chain (.clk(dsp_clk), .reset(dsp_rst), .set_stb(set_stb_dsp),.set_addr(set_addr_dsp),.set_data(set_data_dsp), diff --git a/usrp2/top/u2plus/u2plus_core.v b/usrp2/top/u2plus/u2plus_core.v index 4e0b190ef..33db2c2d3 100644 --- a/usrp2/top/u2plus/u2plus_core.v +++ b/usrp2/top/u2plus/u2plus_core.v @@ -652,7 +652,8 @@ module u2plus_core vita_tx_chain #(.BASE_CTRL(SR_TX_CTRL), .BASE_DSP(SR_TX_DSP), .REPORT_ERROR(1), .DO_FLOW_CONTROL(1), - .PROT_ENG_FLAGS(1), .USE_TRANS_HEADER(1)) + .PROT_ENG_FLAGS(1), .USE_TRANS_HEADER(1), + .DSP_NUMBER(0)) vita_tx_chain (.clk(dsp_clk), .reset(dsp_rst), .set_stb(set_stb_dsp),.set_addr(set_addr_dsp),.set_data(set_data_dsp), |