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authorNick Foster <nick@nerdnetworks.org>2010-07-19 18:13:56 -0700
committerNick Foster <nick@nerdnetworks.org>2010-07-19 18:13:56 -0700
commit3d96ee15d99bf08554a3075b5814dabc51eef389 (patch)
tree1cc93e3a29827a10bb7562cf45fb9d7cd297956f /usrp2/top/u2plus/u2plus_core.v
parent219934cb7ab33356c7c53409a9c16da6097135dc (diff)
parent814b06dff3ffccdf7d8f80fcb93d21d740612804 (diff)
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Merge branch 'u2p' of ettus.sourcerepo.com:ettus/fpgapriv into u2p
Diffstat (limited to 'usrp2/top/u2plus/u2plus_core.v')
-rw-r--r--usrp2/top/u2plus/u2plus_core.v5
1 files changed, 3 insertions, 2 deletions
diff --git a/usrp2/top/u2plus/u2plus_core.v b/usrp2/top/u2plus/u2plus_core.v
index 189a342cd..9e197cfbb 100644
--- a/usrp2/top/u2plus/u2plus_core.v
+++ b/usrp2/top/u2plus/u2plus_core.v
@@ -124,7 +124,8 @@ module u2plus_core
output uart_baud_o,
input sim_mode,
input [3:0] clock_divider,
-
+ input button,
+
output spiflash_cs, output spiflash_clk, input spiflash_miso, output spiflash_mosi
);
@@ -512,7 +513,7 @@ defparam bootram.RAM0.INIT_21=256'h00000000_00000000_00000000_00000000_00000000_
assign irq= {{8'b0},
{8'b0},
- {3'b0, periodic_int, clk_status, serdes_link_up, uart_tx_int, uart_rx_int},
+ {2'b0, button, periodic_int, clk_status, serdes_link_up, uart_tx_int, uart_rx_int},
{pps_int,overrun,underrun,PHY_INTn,i2c_int,spi_int,onetime_int,buffer_int}};
pic pic(.clk_i(wb_clk),.rst_i(wb_rst),.cyc_i(s8_cyc),.stb_i(s8_stb),.adr_i(s8_adr[4:2]),