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| author | Matt Ettus <matt@ettus.com> | 2011-01-06 12:41:33 -0800 |
|---|---|---|
| committer | Matt Ettus <matt@ettus.com> | 2011-06-07 14:42:58 -0700 |
| commit | e2eca54dafc2f9040485d3f5658ce97dad66aa2b (patch) | |
| tree | 3016eb8876877c9e9a061d8b5c6366c485ac1cf8 /usrp2/top/u2plus/Makefile | |
| parent | e7eb44d5abc1021972c07c4b867c98c8223eca2b (diff) | |
| download | uhd-e2eca54dafc2f9040485d3f5658ce97dad66aa2b.tar.gz uhd-e2eca54dafc2f9040485d3f5658ce97dad66aa2b.tar.bz2 uhd-e2eca54dafc2f9040485d3f5658ce97dad66aa2b.zip | |
builds now
Diffstat (limited to 'usrp2/top/u2plus/Makefile')
| -rw-r--r-- | usrp2/top/u2plus/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/usrp2/top/u2plus/Makefile b/usrp2/top/u2plus/Makefile index 38400ce62..ed044d6a8 100644 --- a/usrp2/top/u2plus/Makefile +++ b/usrp2/top/u2plus/Makefile @@ -45,6 +45,7 @@ simulator "ISE Simulator (VHDL/Verilog)" \ # Sources ################################################## TOP_SRCS = \ +capture_ddrlvds.v \ u2plus_core.v \ u2plus.v \ u2plus.ucf |