From e2eca54dafc2f9040485d3f5658ce97dad66aa2b Mon Sep 17 00:00:00 2001
From: Matt Ettus <matt@ettus.com>
Date: Thu, 6 Jan 2011 12:41:33 -0800
Subject: builds now

---
 usrp2/top/u2plus/Makefile | 1 +
 1 file changed, 1 insertion(+)

(limited to 'usrp2/top/u2plus/Makefile')

diff --git a/usrp2/top/u2plus/Makefile b/usrp2/top/u2plus/Makefile
index 38400ce62..ed044d6a8 100644
--- a/usrp2/top/u2plus/Makefile
+++ b/usrp2/top/u2plus/Makefile
@@ -45,6 +45,7 @@ simulator "ISE Simulator (VHDL/Verilog)" \
 # Sources
 ##################################################
 TOP_SRCS = \
+capture_ddrlvds.v \
 u2plus_core.v \
 u2plus.v \
 u2plus.ucf
-- 
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