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authorMatt Ettus <matt@ettus.com>2010-12-05 20:33:05 -0800
committerMatt Ettus <matt@ettus.com>2011-06-08 10:52:50 -0700
commitce43cdfc6782b9f24781170f8f78a96e93bb2365 (patch)
tree0510b18aa705468fa2f2df7d80a2cf94490c9eab /usrp2/sdr_lib/add2_and_clip.v
parent23c373f4ebea614a59f2032293b0264d93468fef (diff)
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redone DC offset with sigma-delta quantization
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diff --git a/usrp2/sdr_lib/add2_and_clip.v b/usrp2/sdr_lib/add2_and_clip.v
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+
+module add2_and_clip
+ #(parameter WIDTH=16)
+ (input [WIDTH-1:0] in1,
+ input [WIDTH-1:0] in2,
+ output [WIDTH-1:0] sum);
+
+ wire [WIDTH:0] sum_int = {in1[WIDTH-1],in1} + {in2[WIDTH-1],in2};
+ clip #(.bits_in(WIDTH+1),.bits_out(WIDTH)) clip
+ (.in(sum_int),.out(sum));
+
+endmodule // add2_and_clip