Merge branch 'master' into u1e_merge_with_master

* master:
  get rid of some warnings by declaring setting reg width
  added width parameter to avoid warnings (thanks IJB) and default value parameter
  added pragmas suggested by Ian Buckley to help ISE12 synthesis
  get rid of old CVS linkage
  settings bus to dsp_clk now uses clock crossing fifo
  remove files for old prototypes, they were confusing people
  revert commit 9899b81f920 which should have improved timing but didn't

Conflicts:
	usrp2/control_lib/setting_reg.v
	usrp2/top/u2_core/u2_core.v
	usrp2/top/u2_rev3/Makefile

20 files changed, 0 insertions, 20 deletions

diff --git a/usrp2/opencores/i2c/sim/CVS/Entries b/usrp2/opencores/i2c/sim/CVS/Entries
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index d08a896a5..000000000
--- a/usrp2/opencores/i2c/sim/CVS/Entries
+++ /dev/null
@@ -1 +0,0 @@
-D/i2c_verilog////
diff --git a/usrp2/opencores/i2c/sim/CVS/Repository b/usrp2/opencores/i2c/sim/CVS/Repository
deleted file mode 100644
index 500d85906..000000000
--- a/usrp2/opencores/i2c/sim/CVS/Repository
+++ /dev/null
@@ -1 +0,0 @@
-i2c/sim
diff --git a/usrp2/opencores/i2c/sim/CVS/Root b/usrp2/opencores/i2c/sim/CVS/Root
deleted file mode 100644
index 44b2aa23b..000000000
--- a/usrp2/opencores/i2c/sim/CVS/Root
+++ /dev/null
@@ -1 +0,0 @@
-:pserver:anonymous@cvs.opencores.org:/cvsroot/anonymous
diff --git a/usrp2/opencores/i2c/sim/CVS/Template b/usrp2/opencores/i2c/sim/CVS/Template
deleted file mode 100644
index e69de29bb..000000000
--- a/usrp2/opencores/i2c/sim/CVS/Template
+++ /dev/null
diff --git a/usrp2/opencores/i2c/sim/i2c_verilog/CVS/Entries b/usrp2/opencores/i2c/sim/i2c_verilog/CVS/Entries
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index 8ab9f73a7..000000000
--- a/usrp2/opencores/i2c/sim/i2c_verilog/CVS/Entries
+++ /dev/null
@@ -1 +0,0 @@
-D/run////
diff --git a/usrp2/opencores/i2c/sim/i2c_verilog/CVS/Repository b/usrp2/opencores/i2c/sim/i2c_verilog/CVS/Repository
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index b97ee33c8..000000000
--- a/usrp2/opencores/i2c/sim/i2c_verilog/CVS/Repository
+++ /dev/null
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-i2c/sim/i2c_verilog
diff --git a/usrp2/opencores/i2c/sim/i2c_verilog/CVS/Root b/usrp2/opencores/i2c/sim/i2c_verilog/CVS/Root
deleted file mode 100644
index 44b2aa23b..000000000
--- a/usrp2/opencores/i2c/sim/i2c_verilog/CVS/Root
+++ /dev/null
@@ -1 +0,0 @@
-:pserver:anonymous@cvs.opencores.org:/cvsroot/anonymous
diff --git a/usrp2/opencores/i2c/sim/i2c_verilog/CVS/Template b/usrp2/opencores/i2c/sim/i2c_verilog/CVS/Template
deleted file mode 100644
index e69de29bb..000000000
--- a/usrp2/opencores/i2c/sim/i2c_verilog/CVS/Template
+++ /dev/null
diff --git a/usrp2/opencores/i2c/sim/i2c_verilog/run/CVS/Entries b/usrp2/opencores/i2c/sim/i2c_verilog/run/CVS/Entries
deleted file mode 100644
index ddea0baae..000000000
--- a/usrp2/opencores/i2c/sim/i2c_verilog/run/CVS/Entries
+++ /dev/null
@@ -1,6 +0,0 @@
-/bench.vcd/1.1/Sat Jun 15 07:37:05 2002//
-/ncverilog.key/1.1/Sat Jun 15 07:37:11 2002//
-/ncverilog.log/1.1/Sat Jun 15 07:37:11 2002//
-/run/1.2/Fri Apr  6 09:02:38 2007//
-D/INCA_libs////
-D/waves////
diff --git a/usrp2/opencores/i2c/sim/i2c_verilog/run/CVS/Repository b/usrp2/opencores/i2c/sim/i2c_verilog/run/CVS/Repository
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index bdd990e7c..000000000
--- a/usrp2/opencores/i2c/sim/i2c_verilog/run/CVS/Repository
+++ /dev/null
@@ -1 +0,0 @@
-i2c/sim/i2c_verilog/run
diff --git a/usrp2/opencores/i2c/sim/i2c_verilog/run/CVS/Root b/usrp2/opencores/i2c/sim/i2c_verilog/run/CVS/Root
deleted file mode 100644
index 44b2aa23b..000000000
--- a/usrp2/opencores/i2c/sim/i2c_verilog/run/CVS/Root
+++ /dev/null
@@ -1 +0,0 @@
-:pserver:anonymous@cvs.opencores.org:/cvsroot/anonymous
diff --git a/usrp2/opencores/i2c/sim/i2c_verilog/run/CVS/Template b/usrp2/opencores/i2c/sim/i2c_verilog/run/CVS/Template
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--- a/usrp2/opencores/i2c/sim/i2c_verilog/run/CVS/Template
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diff --git a/usrp2/opencores/i2c/sim/i2c_verilog/run/INCA_libs/CVS/Entries b/usrp2/opencores/i2c/sim/i2c_verilog/run/INCA_libs/CVS/Entries
deleted file mode 100644
index 178481050..000000000
--- a/usrp2/opencores/i2c/sim/i2c_verilog/run/INCA_libs/CVS/Entries
+++ /dev/null
@@ -1 +0,0 @@
-D
diff --git a/usrp2/opencores/i2c/sim/i2c_verilog/run/INCA_libs/CVS/Repository b/usrp2/opencores/i2c/sim/i2c_verilog/run/INCA_libs/CVS/Repository
deleted file mode 100644
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--- a/usrp2/opencores/i2c/sim/i2c_verilog/run/INCA_libs/CVS/Repository
+++ /dev/null
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-i2c/sim/i2c_verilog/run/INCA_libs
diff --git a/usrp2/opencores/i2c/sim/i2c_verilog/run/INCA_libs/CVS/Root b/usrp2/opencores/i2c/sim/i2c_verilog/run/INCA_libs/CVS/Root
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--- a/usrp2/opencores/i2c/sim/i2c_verilog/run/INCA_libs/CVS/Root
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-:pserver:anonymous@cvs.opencores.org:/cvsroot/anonymous
diff --git a/usrp2/opencores/i2c/sim/i2c_verilog/run/INCA_libs/CVS/Template b/usrp2/opencores/i2c/sim/i2c_verilog/run/INCA_libs/CVS/Template
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--- a/usrp2/opencores/i2c/sim/i2c_verilog/run/INCA_libs/CVS/Template
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diff --git a/usrp2/opencores/i2c/sim/i2c_verilog/run/waves/CVS/Entries b/usrp2/opencores/i2c/sim/i2c_verilog/run/waves/CVS/Entries
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index 178481050..000000000
--- a/usrp2/opencores/i2c/sim/i2c_verilog/run/waves/CVS/Entries
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-D
diff --git a/usrp2/opencores/i2c/sim/i2c_verilog/run/waves/CVS/Repository b/usrp2/opencores/i2c/sim/i2c_verilog/run/waves/CVS/Repository
deleted file mode 100644
index 94d106eb0..000000000
--- a/usrp2/opencores/i2c/sim/i2c_verilog/run/waves/CVS/Repository
+++ /dev/null
@@ -1 +0,0 @@
-i2c/sim/i2c_verilog/run/waves
diff --git a/usrp2/opencores/i2c/sim/i2c_verilog/run/waves/CVS/Root b/usrp2/opencores/i2c/sim/i2c_verilog/run/waves/CVS/Root
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--- a/usrp2/opencores/i2c/sim/i2c_verilog/run/waves/CVS/Root
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-:pserver:anonymous@cvs.opencores.org:/cvsroot/anonymous
diff --git a/usrp2/opencores/i2c/sim/i2c_verilog/run/waves/CVS/Template b/usrp2/opencores/i2c/sim/i2c_verilog/run/waves/CVS/Template
deleted file mode 100644
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--- a/usrp2/opencores/i2c/sim/i2c_verilog/run/waves/CVS/Template
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