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| author | Josh Blum <josh@joshknows.com> | 2010-01-22 16:00:45 -0800 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2010-01-22 16:00:45 -0800 |
| commit | 8b377a9d6d0ad281474a8dbff49ea3b093178b28 (patch) | |
| tree | 8e3c7a1b60f96df6e2140666d3b7afa5166d885d /usrp2/opencores/i2c/bench/verilog/CVS | |
| parent | e92d36dcfe02afaedec348f2d8fc4523fb4e633b (diff) | |
| download | uhd-8b377a9d6d0ad281474a8dbff49ea3b093178b28.tar.gz uhd-8b377a9d6d0ad281474a8dbff49ea3b093178b28.tar.bz2 uhd-8b377a9d6d0ad281474a8dbff49ea3b093178b28.zip | |
moved into subdir
Diffstat (limited to 'usrp2/opencores/i2c/bench/verilog/CVS')
| -rw-r--r-- | usrp2/opencores/i2c/bench/verilog/CVS/Entries | 5 | ||||
| -rw-r--r-- | usrp2/opencores/i2c/bench/verilog/CVS/Repository | 1 | ||||
| -rw-r--r-- | usrp2/opencores/i2c/bench/verilog/CVS/Root | 1 | ||||
| -rw-r--r-- | usrp2/opencores/i2c/bench/verilog/CVS/Template | 0 |
4 files changed, 7 insertions, 0 deletions
diff --git a/usrp2/opencores/i2c/bench/verilog/CVS/Entries b/usrp2/opencores/i2c/bench/verilog/CVS/Entries new file mode 100644 index 000000000..2dd779100 --- /dev/null +++ b/usrp2/opencores/i2c/bench/verilog/CVS/Entries @@ -0,0 +1,5 @@ +/i2c_slave_model.v/1.7/Mon Sep 4 09:08:51 2006// +/spi_slave_model.v/1.1/Sat Feb 28 15:32:54 2004// +/tst_bench_top.v/1.8/Mon Sep 4 09:08:51 2006// +/wb_master_model.v/1.4/Sat Feb 28 15:40:42 2004// +D diff --git a/usrp2/opencores/i2c/bench/verilog/CVS/Repository b/usrp2/opencores/i2c/bench/verilog/CVS/Repository new file mode 100644 index 000000000..b37c379e9 --- /dev/null +++ b/usrp2/opencores/i2c/bench/verilog/CVS/Repository @@ -0,0 +1 @@ +i2c/bench/verilog diff --git a/usrp2/opencores/i2c/bench/verilog/CVS/Root b/usrp2/opencores/i2c/bench/verilog/CVS/Root new file mode 100644 index 000000000..44b2aa23b --- /dev/null +++ b/usrp2/opencores/i2c/bench/verilog/CVS/Root @@ -0,0 +1 @@ +:pserver:anonymous@cvs.opencores.org:/cvsroot/anonymous diff --git a/usrp2/opencores/i2c/bench/verilog/CVS/Template b/usrp2/opencores/i2c/bench/verilog/CVS/Template new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/usrp2/opencores/i2c/bench/verilog/CVS/Template |