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| author | Josh Blum <josh@joshknows.com> | 2010-01-22 16:00:45 -0800 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2010-01-22 16:00:45 -0800 |
| commit | 8b377a9d6d0ad281474a8dbff49ea3b093178b28 (patch) | |
| tree | 8e3c7a1b60f96df6e2140666d3b7afa5166d885d /usrp2/opencores/aemb/rtl/verilog/CVS | |
| parent | e92d36dcfe02afaedec348f2d8fc4523fb4e633b (diff) | |
| download | uhd-8b377a9d6d0ad281474a8dbff49ea3b093178b28.tar.gz uhd-8b377a9d6d0ad281474a8dbff49ea3b093178b28.tar.bz2 uhd-8b377a9d6d0ad281474a8dbff49ea3b093178b28.zip | |
moved into subdir
Diffstat (limited to 'usrp2/opencores/aemb/rtl/verilog/CVS')
| -rw-r--r-- | usrp2/opencores/aemb/rtl/verilog/CVS/Entries | 38 | ||||
| -rw-r--r-- | usrp2/opencores/aemb/rtl/verilog/CVS/Repository | 1 | ||||
| -rw-r--r-- | usrp2/opencores/aemb/rtl/verilog/CVS/Root | 1 | ||||
| -rw-r--r-- | usrp2/opencores/aemb/rtl/verilog/CVS/Template | 0 |
4 files changed, 40 insertions, 0 deletions
diff --git a/usrp2/opencores/aemb/rtl/verilog/CVS/Entries b/usrp2/opencores/aemb/rtl/verilog/CVS/Entries new file mode 100644 index 000000000..f17d70235 --- /dev/null +++ b/usrp2/opencores/aemb/rtl/verilog/CVS/Entries @@ -0,0 +1,38 @@ +/aeMB2_aslu.v/1.10/Tue May 20 18:13:50 2008// +/aeMB2_bpcu.v/1.5/Tue May 20 18:13:50 2008// +/aeMB2_brcc.v/1.3/Tue May 20 18:13:50 2008// +/aeMB2_bsft.v/1.3/Tue May 20 18:13:50 2008// +/aeMB2_ctrl.v/1.7/Tue May 20 18:13:51 2008// +/aeMB2_dparam.v/1.1/Tue May 20 18:13:51 2008// +/aeMB2_dwbif.v/1.7/Tue May 20 18:13:51 2008// +/aeMB2_edk32.v/1.8/Tue May 20 18:13:51 2008// +/aeMB2_edk62.v/1.8/Tue May 20 18:13:51 2008// +/aeMB2_exec.v/1.4/Tue May 20 18:13:51 2008// +/aeMB2_gprf.v/1.4/Tue May 20 18:13:51 2008// +/aeMB2_iche.v/1.5/Tue May 20 18:13:51 2008// +/aeMB2_idmx.v/1.5/Tue May 20 18:13:51 2008// +/aeMB2_intu.v/1.7/Tue May 20 18:13:51 2008// +/aeMB2_iwbif.v/1.5/Tue May 20 18:13:51 2008// +/aeMB2_memif.v/1.3/Tue May 20 18:13:51 2008// +/aeMB2_mult.v/1.5/Tue May 20 18:13:51 2008// +/aeMB2_ofid.v/1.2/Tue May 20 18:13:51 2008// +/aeMB2_opmx.v/1.3/Tue May 20 18:13:51 2008// +/aeMB2_pipe.v/1.4/Tue May 20 18:13:51 2008// +/aeMB2_regf.v/1.3/Tue May 20 18:13:51 2008// +/aeMB2_regs.v/1.4/Tue May 20 18:13:51 2008// +/aeMB2_sfrf.v/1.2/Tue May 20 18:13:51 2008// +/aeMB2_sim.v/1.2/Tue May 20 18:13:51 2008// +/aeMB2_sparam.v/1.2/Tue May 20 18:13:51 2008// +/aeMB2_spsram.v/1.1/Tue May 20 18:13:51 2008// +/aeMB2_sysc.v/1.5/Tue May 20 18:13:51 2008// +/aeMB2_tpsram.v/1.3/Tue May 20 18:13:51 2008// +/aeMB2_xslif.v/1.7/Tue May 20 18:13:52 2008// +/aeMB_bpcu.v/1.4/Thu Sep 11 02:11:12 2008// +/aeMB_core.v/1.9/Thu Sep 11 02:11:12 2008// +/aeMB_ctrl.v/1.10/Thu Sep 11 02:11:12 2008// +/aeMB_edk32.v/1.14/Thu Sep 11 02:11:12 2008// +/aeMB_ibuf.v/1.10/Thu Sep 11 02:11:12 2008// +/aeMB_regf.v/1.3/Thu Sep 11 02:11:12 2008// +/aeMB_sim.v/1.2/Thu Jan 22 05:50:30 2009// +/aeMB_xecu.v/1.12/Thu Sep 11 02:11:12 2008// +D diff --git a/usrp2/opencores/aemb/rtl/verilog/CVS/Repository b/usrp2/opencores/aemb/rtl/verilog/CVS/Repository new file mode 100644 index 000000000..a9de19556 --- /dev/null +++ b/usrp2/opencores/aemb/rtl/verilog/CVS/Repository @@ -0,0 +1 @@ +aemb/rtl/verilog diff --git a/usrp2/opencores/aemb/rtl/verilog/CVS/Root b/usrp2/opencores/aemb/rtl/verilog/CVS/Root new file mode 100644 index 000000000..44b2aa23b --- /dev/null +++ b/usrp2/opencores/aemb/rtl/verilog/CVS/Root @@ -0,0 +1 @@ +:pserver:anonymous@cvs.opencores.org:/cvsroot/anonymous diff --git a/usrp2/opencores/aemb/rtl/verilog/CVS/Template b/usrp2/opencores/aemb/rtl/verilog/CVS/Template new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/usrp2/opencores/aemb/rtl/verilog/CVS/Template |