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author | Matt Ettus <matt@ettus.com> | 2010-04-14 18:07:00 -0700 |
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committer | Matt Ettus <matt@ettus.com> | 2010-04-14 18:07:00 -0700 |
commit | fc54a55f97171f5714c370d566f31429ce112e89 (patch) | |
tree | 9622971ec054e8b6fe005abbaf7220f4ccca5e46 /usrp2/gpmc/single_data_write.txt | |
parent | 17fc80cb82309879dd2b1dc03681058dd432327b (diff) | |
download | uhd-fc54a55f97171f5714c370d566f31429ce112e89.tar.gz uhd-fc54a55f97171f5714c370d566f31429ce112e89.tar.bz2 uhd-fc54a55f97171f5714c370d566f31429ce112e89.zip |
make timing diagrams for bus transactions. Still need to do reads
Diffstat (limited to 'usrp2/gpmc/single_data_write.txt')
-rw-r--r-- | usrp2/gpmc/single_data_write.txt | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/usrp2/gpmc/single_data_write.txt b/usrp2/gpmc/single_data_write.txt new file mode 100644 index 000000000..287e3e2c1 --- /dev/null +++ b/usrp2/gpmc/single_data_write.txt @@ -0,0 +1,10 @@ +# OMAP writes to FPGA +# initialize the signals +CLK=0,nWE=1,nCS=1,nOE=1,DATA=Z. +CLK=1. +CLK=0,nWE=0,nCS=0,DATA=WR_DATA. +CLK=1. +CLK=0,nWE=1,nCS=1,DATA=Z. +CLK=1. + + |