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authorMatt Ettus <matt@ettus.com>2010-06-14 11:59:19 -0700
committerMatt Ettus <matt@ettus.com>2010-06-14 11:59:19 -0700
commit81ad405f9ddecf13e1238bdc53a251b0b71022b5 (patch)
tree999d7ebf90ad86e8e56aa8f06a44d5b74fa4833f /usrp2/control_lib/newfifo/fifo36_to_fifo19.v
parentfb704918b285a7d039cda27daf35f628442a7dca (diff)
parent1935f2a4ed0d0abc90bb3fe7fed745ff84ab6d7c (diff)
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Merge branch 'master' into u2p
* master: produces good bin files first attempt at cleaning up the build system
Diffstat (limited to 'usrp2/control_lib/newfifo/fifo36_to_fifo19.v')
-rw-r--r--usrp2/control_lib/newfifo/fifo36_to_fifo19.v41
1 files changed, 0 insertions, 41 deletions
diff --git a/usrp2/control_lib/newfifo/fifo36_to_fifo19.v b/usrp2/control_lib/newfifo/fifo36_to_fifo19.v
deleted file mode 100644
index de249aaeb..000000000
--- a/usrp2/control_lib/newfifo/fifo36_to_fifo19.v
+++ /dev/null
@@ -1,41 +0,0 @@
-
-module fifo36_to_fifo19
- (input clk, input reset, input clear,
- input [35:0] f36_datain,
- input f36_src_rdy_i,
- output f36_dst_rdy_o,
-
- output [18:0] f19_dataout,
- output f19_src_rdy_o,
- input f19_dst_rdy_i );
-
- wire f36_sof = f36_datain[32];
- wire f36_eof = f36_datain[33];
- wire f36_occ = f36_datain[35:34];
-
- reg phase;
-
- wire half_line = f36_eof & ((f36_occ==1)|(f36_occ==2));
-
- assign f19_dataout[15:0] = phase ? f36_datain[15:0] : f36_datain[31:16];
- assign f19_dataout[16] = phase ? 0 : f36_sof;
- assign f19_dataout[17] = phase ? f36_eof : half_line;
- assign f19_dataout[18] = f19_dataout[17] & ((f36_occ==1)|(f36_occ==3));
-
- assign f19_src_rdy_o = f36_src_rdy_i;
- assign f36_dst_rdy_o = (phase | half_line) & f19_dst_rdy_i;
-
- wire f19_xfer = f19_src_rdy_o & f19_dst_rdy_i;
- wire f36_xfer = f36_src_rdy_i & f36_dst_rdy_o;
-
- always @(posedge clk)
- if(reset)
- phase <= 0;
- else if(f36_xfer)
- phase <= 0;
- else if(f19_xfer)
- phase <= 1;
-
-
-endmodule // fifo36_to_fifo19
-