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authorMatt Ettus <matt@ettus.com>2011-03-16 16:42:51 -0700
committerMatt Ettus <matt@ettus.com>2011-03-16 16:42:51 -0700
commitb357b627fb3f519408ca38ebadc9f4ae6d57de80 (patch)
treed7f11bc309111c65f0e705e2e39f70a44101b941 /usrp2/control_lib/atr_controller.v
parent74979af6a089c67ac6579cb08040aec305032018 (diff)
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clean up a bunch of warnings and incorrect bus widths
Diffstat (limited to 'usrp2/control_lib/atr_controller.v')
-rw-r--r--usrp2/control_lib/atr_controller.v2
1 files changed, 1 insertions, 1 deletions
diff --git a/usrp2/control_lib/atr_controller.v b/usrp2/control_lib/atr_controller.v
index fed2791f9..a161b5e00 100644
--- a/usrp2/control_lib/atr_controller.v
+++ b/usrp2/control_lib/atr_controller.v
@@ -7,7 +7,7 @@ module atr_controller
(input clk_i, input rst_i,
input [5:0] adr_i, input [3:0] sel_i, input [31:0] dat_i, output reg [31:0] dat_o,
input we_i, input stb_i, input cyc_i, output reg ack_o,
- input run_rx, input run_tx, input [31:0] master_time,
+ input run_rx, input run_tx,
output [31:0] ctrl_lines);
reg [3:0] state;