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authorMatt Ettus <matt@ettus.com>2010-03-26 11:30:13 -0700
committerMatt Ettus <matt@ettus.com>2010-03-26 11:30:13 -0700
commit7a3064b67172aea1be00d188bdd79185a7df2ecf (patch)
tree3be087c9d1a37a855fa54097d751b92053c16af5 /usrp1/tb
parentf979a9d4e7b9664e046aaca54357e46782c4aa51 (diff)
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connect 2 clock gen controls and 3 status pins to the wishbone so they can be read/controlled from SW
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