aboutsummaryrefslogtreecommitdiffstats
path: root/toplevel/usrp_inband_usb/usrp_inband_usb.v
diff options
context:
space:
mode:
authoreb <eb@221aa14e-8319-0410-a670-987f0aec2ac5>2007-05-02 04:08:47 +0000
committereb <eb@221aa14e-8319-0410-a670-987f0aec2ac5>2007-05-02 04:08:47 +0000
commitb535098017d3df071b031bd15452a7bba53aab14 (patch)
tree24b141edd2f7d57562ae2e2ad05502b7852ad06f /toplevel/usrp_inband_usb/usrp_inband_usb.v
parent5a17f48e7374466b10787ef2721166b1bb862cf1 (diff)
downloaduhd-b535098017d3df071b031bd15452a7bba53aab14.tar.gz
uhd-b535098017d3df071b031bd15452a7bba53aab14.tar.bz2
uhd-b535098017d3df071b031bd15452a7bba53aab14.zip
Merged features/inband -r4812:5218 into trunk. This group of changes includes:
* working stand-alone mblock code * work-in-progress on usrp inband signaling usrp now depends on mblock, and guile is a dependency. git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@5221 221aa14e-8319-0410-a670-987f0aec2ac5
Diffstat (limited to 'toplevel/usrp_inband_usb/usrp_inband_usb.v')
-rw-r--r--toplevel/usrp_inband_usb/usrp_inband_usb.v16
1 files changed, 16 insertions, 0 deletions
diff --git a/toplevel/usrp_inband_usb/usrp_inband_usb.v b/toplevel/usrp_inband_usb/usrp_inband_usb.v
index 55701b897..cc7490c5a 100644
--- a/toplevel/usrp_inband_usb/usrp_inband_usb.v
+++ b/toplevel/usrp_inband_usb/usrp_inband_usb.v
@@ -19,6 +19,7 @@
// along with this program; if not, write to the Free Software
// Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA
//
+`define IN_BAND
`include "config.vh"
`include "../../../firmware/include/fpga_regs_common.v"
@@ -122,6 +123,20 @@ module usrp_inband_usb
assign bb_tx_i1 = ch2tx;
assign bb_tx_q1 = ch3tx;
+`ifdef IN_BAND
+ tx_buffer_inband tx_buffer
+ ( .usbclk(usbclk),.bus_reset(tx_bus_reset),.reset(tx_dsp_reset),
+ .usbdata(usbdata),.WR(WR),.have_space(have_space),.tx_underrun(tx_underrun),
+ .channels({tx_numchan,1'b0}),
+ .tx_i_0(ch0tx),.tx_q_0(ch1tx),
+ .tx_i_1(ch2tx),.tx_q_1(ch3tx),
+ .tx_i_2(),.tx_q_2(),
+ .tx_i_3(),.tx_q_3(),
+ .txclk(clk64),.txstrobe(strobe_interp),
+ .clear_status(clear_status),
+ .tx_empty(tx_empty),
+ .debugbus(tx_debugbus) );
+`else
tx_buffer tx_buffer
( .usbclk(usbclk),.bus_reset(tx_bus_reset),.reset(tx_dsp_reset),
.usbdata(usbdata),.WR(WR),.have_space(have_space),.tx_underrun(tx_underrun),
@@ -134,6 +149,7 @@ module usrp_inband_usb
.clear_status(clear_status),
.tx_empty(tx_empty),
.debugbus(tx_debugbus) );
+`endif
`ifdef TX_EN_0
tx_chain tx_chain_0