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| author | Matt Ettus <matt@ettus.com> | 2009-09-05 13:38:13 -0700 |
|---|---|---|
| committer | Matt Ettus <matt@ettus.com> | 2009-09-05 13:38:13 -0700 |
| commit | eee63907c03961549eb377ffd933407fb9b9a651 (patch) | |
| tree | fe0f501963ec3c25adaea8fca717e4bbfb6ba900 /top/u2_core | |
| parent | c21464b1107295575afa958e34f915f7d9985c14 (diff) | |
| download | uhd-eee63907c03961549eb377ffd933407fb9b9a651.tar.gz uhd-eee63907c03961549eb377ffd933407fb9b9a651.tar.bz2 uhd-eee63907c03961549eb377ffd933407fb9b9a651.zip | |
fix a typo which caused tx glitches
Diffstat (limited to 'top/u2_core')
| -rwxr-xr-x | top/u2_core/u2_core.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/top/u2_core/u2_core.v b/top/u2_core/u2_core.v index 918215093..e55783d0b 100755 --- a/top/u2_core/u2_core.v +++ b/top/u2_core/u2_core.v @@ -572,7 +572,7 @@ module u2_core (.clk(dsp_clk), .rst(dsp_rst), .set_stb(set_stb),.set_addr(set_addr),.set_data(set_data), .master_time(master_time),.underrun(underrun), - .rd_dat_i(rd1_dat), .rd_flags_i(rd_flags), .rd_ready_i(rd1_ready_o), .rd_ready_o(rd1_ready_i), + .rd_dat_i(rd1_dat), .rd_flags_i(rd1_flags), .rd_ready_i(rd1_ready_o), .rd_ready_o(rd1_ready_i), .sample(sample_tx), .run(run_tx), .strobe(strobe_tx), .fifo_occupied(dsp_tx_occ),.fifo_full(dsp_tx_full),.fifo_empty(dsp_tx_empty), .debug(debug_txc) ); |