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authorMartin Braun <martin.braun@ettus.com>2020-07-29 18:05:26 +0200
committerAaron Rossetto <aaron.rossetto@ni.com>2020-08-07 07:25:08 -0500
commitd05bacf1209044ca3f9007b983e963c72ec36337 (patch)
treebadc0beac49bcc02ac1905f1f14a3e8dbc133a68 /mpm
parent6c213ecd0927d10a98ba6ec64fbc9338516edee2 (diff)
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mpm: Remove SID class
This class is a remnant of UHD 3, and is no longer used anywhere. SID is no longer used at all in UHD, in fact, which means the class did not represent a valid data structure.
Diffstat (limited to 'mpm')
-rw-r--r--mpm/python/usrp_mpm/mpmtypes.py75
-rw-r--r--mpm/python/usrp_mpm/periph_manager/e31x.py1
-rw-r--r--mpm/python/usrp_mpm/periph_manager/e320.py1
-rw-r--r--mpm/python/usrp_mpm/periph_manager/n3xx.py1
4 files changed, 2 insertions, 76 deletions
diff --git a/mpm/python/usrp_mpm/mpmtypes.py b/mpm/python/usrp_mpm/mpmtypes.py
index 87f44f46f..5eab23e3d 100644
--- a/mpm/python/usrp_mpm/mpmtypes.py
+++ b/mpm/python/usrp_mpm/mpmtypes.py
@@ -11,13 +11,13 @@ import ctypes
from multiprocessing import Value
from multiprocessing import Array
from multiprocessing import RLock
-from builtins import object
MPM_RPC_PORT = 49601
MPM_DISCOVERY_PORT = 49600
MPM_DISCOVERY_MESSAGE = "MPM-DISC"
-class SharedState(object):
+# pylint: disable=too-few-public-methods
+class SharedState:
"""
Holds information which should be shared between processes.
"""
@@ -30,74 +30,3 @@ class SharedState(object):
self.dev_type = Array(ctypes.c_char, 16, lock=self.lock)
self.dev_serial = Array(ctypes.c_char, 8, lock=self.lock)
self.dev_product = Array(ctypes.c_char, 16, lock=self.lock)
-
-class SID(object):
- """
- Python representation of a 32-bit SID.
- """
- def __init__(self, sid=None):
- sid = sid or 0
- if isinstance(sid, str):
- src, dst = sid.split(">")
- if src.find(':') != -1:
- self.src_addr, self.src_ep = \
- [int(x, 16) for x in src.split(':', 2)]
- else:
- self.src_addr, self.src_ep = \
- [int(x, 10) for x in src.split('.', 2)]
- if dst.find(':') != -1:
- self.dst_addr, self.dst_ep = \
- [int(x, 16) for x in dst.split(':', 2)]
- else:
- self.dst_addr, self.dst_ep = \
- [int(x, 10) for x in dst.split('.', 2)]
- else:
- self.src_addr = sid >> 24
- self.src_ep = (sid >> 16) & 0xFF
- self.dst_addr = (sid >> 8) & 0xFF
- self.dst_ep = sid & 0xFF
-
- def set_src_addr(self, new_addr):
- " Set source address (e.g. 02:30>00:01 -> 2) "
- self.src_addr = new_addr & 0xFF
-
- def set_dst_addr(self, new_addr):
- " Set destination address (e.g. 02:30>00:01 -> 0) "
- self.dst_addr = new_addr & 0xFF
-
- def set_src_ep(self, new_addr):
- " Set source endpoint (e.g. 02:30>00:01 -> 0x30) "
- self.src_ep = new_addr & 0xFF
-
- def set_dst_ep(self, new_addr):
- " Set destination endpoint (e.g. 02:30>00:01 -> 0) "
- self.dst_ep = new_addr & 0xFF
-
- def get_dst_block(self):
- " Get destination block 2:30 or 2:31 --> 23 "
- return (self.dst_addr<<4)&((self.dst_ep & 0xF0)>>4);
-
- def get_dst_ep_port(self):
- " Get destination endpoint "
- return (self.dst_ep & 0x0F);
-
- def reversed(self):
- """
- Return a reversed SID.
- """
- new_sid = SID(self.get())
- new_sid.src_addr, new_sid.dst_addr = new_sid.dst_addr, new_sid.src_addr
- new_sid.src_ep, new_sid.dst_ep = new_sid.dst_ep, new_sid.src_ep
- return new_sid
-
- def get(self):
- " Return SID as 32-bit number "
- return (self.src_addr << 24) | (self.src_ep << 16) | (self.dst_addr << 8) | self.dst_ep
-
- def __repr__(self):
- return "{:02X}:{:02X}>{:02X}:{:02X}".format(
- self.src_addr, self.src_ep,
- self.dst_addr, self.dst_ep,
- )
-
-
diff --git a/mpm/python/usrp_mpm/periph_manager/e31x.py b/mpm/python/usrp_mpm/periph_manager/e31x.py
index 025f8b222..17cd09c16 100644
--- a/mpm/python/usrp_mpm/periph_manager/e31x.py
+++ b/mpm/python/usrp_mpm/periph_manager/e31x.py
@@ -15,7 +15,6 @@ from six import itervalues
from usrp_mpm.components import ZynqComponents
from usrp_mpm.dboard_manager import E31x_db
from usrp_mpm.gpsd_iface import GPSDIfaceExtension
-from usrp_mpm.mpmtypes import SID
from usrp_mpm.mpmutils import assert_compat_number, str2bool
from usrp_mpm.periph_manager import PeriphManagerBase
from usrp_mpm.rpc_server import no_rpc
diff --git a/mpm/python/usrp_mpm/periph_manager/e320.py b/mpm/python/usrp_mpm/periph_manager/e320.py
index f8b17df7f..fe7debd62 100644
--- a/mpm/python/usrp_mpm/periph_manager/e320.py
+++ b/mpm/python/usrp_mpm/periph_manager/e320.py
@@ -16,7 +16,6 @@ from six import iteritems, itervalues
from usrp_mpm.components import ZynqComponents
from usrp_mpm.dboard_manager import Neon
from usrp_mpm.gpsd_iface import GPSDIfaceExtension
-from usrp_mpm.mpmtypes import SID
from usrp_mpm.mpmutils import assert_compat_number, str2bool
from usrp_mpm.periph_manager import PeriphManagerBase
from usrp_mpm.rpc_server import no_rpc
diff --git a/mpm/python/usrp_mpm/periph_manager/n3xx.py b/mpm/python/usrp_mpm/periph_manager/n3xx.py
index 4e9406c81..1cb1e4a9a 100644
--- a/mpm/python/usrp_mpm/periph_manager/n3xx.py
+++ b/mpm/python/usrp_mpm/periph_manager/n3xx.py
@@ -17,7 +17,6 @@ from usrp_mpm.cores import WhiteRabbitRegsControl
from usrp_mpm.components import ZynqComponents
from usrp_mpm.gpsd_iface import GPSDIfaceExtension
from usrp_mpm.periph_manager import PeriphManagerBase
-from usrp_mpm.mpmtypes import SID
from usrp_mpm.mpmutils import assert_compat_number, str2bool, poll_with_timeout
from usrp_mpm.rpc_server import no_rpc
from usrp_mpm.sys_utils import dtoverlay