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author | Trung N Tran <trung.tran@ettus.com> | 2018-02-02 17:09:55 -0800 |
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committer | Martin Braun <martin.braun@ettus.com> | 2018-02-21 16:58:51 -0800 |
commit | cf7667fe71c961a4656ddb961302cc5a7e5570ed (patch) | |
tree | 5f509dffd91e50bc3efd5ca6d3820bec691b8950 /mpm | |
parent | 6d0404c678d44eb41b39f792dff5915fd218f722 (diff) | |
download | uhd-cf7667fe71c961a4656ddb961302cc5a7e5570ed.tar.gz uhd-cf7667fe71c961a4656ddb961302cc5a7e5570ed.tar.bz2 uhd-cf7667fe71c961a4656ddb961302cc5a7e5570ed.zip |
n3xx_bist: set fp_gpio master to PS
Diffstat (limited to 'mpm')
-rwxr-xr-x | mpm/python/n3xx_bist | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/mpm/python/n3xx_bist b/mpm/python/n3xx_bist index 032297090..22f56be84 100755 --- a/mpm/python/n3xx_bist +++ b/mpm/python/n3xx_bist @@ -679,6 +679,8 @@ class N310BIST(object): from usrp_mpm.periph_manager import n310 gpio_tca6424 = n310.TCA6424(self.mb_rev) gpio_tca6424.set("FPGA-GPIO-EN") + mb_regs = n310.MboardRegsControl(n310.n310.mboard_regs_label, self.log) + mb_regs.set_fp_gpio_master(0xFFF) # Allow some time for the front-panel GPIOs to become usable time.sleep(.5) ddr1 = 0x03f |