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authordjepson1 <daniel.jepson@ni.com>2018-01-19 09:22:25 -0600
committerAshish Chaudhari <ashish.chaudhari@ettus.com>2018-03-07 12:40:28 -0800
commit38771b0f2fdfc350886e58e23e8806bec10cd83a (patch)
tree69b43ebe9f088a5177fd7f4867544d9322f1bb3d /mpm
parent7d0aec18905802ddc466e69055520e8c42cf23c8 (diff)
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lmk: clean up logging statements
Diffstat (limited to 'mpm')
-rw-r--r--mpm/python/usrp_mpm/dboard_manager/lmk_mg.py4
1 files changed, 2 insertions, 2 deletions
diff --git a/mpm/python/usrp_mpm/dboard_manager/lmk_mg.py b/mpm/python/usrp_mpm/dboard_manager/lmk_mg.py
index 2f4d6a192..023b36b5a 100644
--- a/mpm/python/usrp_mpm/dboard_manager/lmk_mg.py
+++ b/mpm/python/usrp_mpm/dboard_manager/lmk_mg.py
@@ -61,7 +61,7 @@ class LMK04828Mg(LMK04828):
"""
Basic init. Turns it on. Let's read SPI.
"""
- self.log.debug("Reset and Verify Chip ID")
+ self.log.trace("Reset and Verify Chip ID")
self.pokes8((
(0x000, 0x90), # Assert reset
(0x000, 0x10), # De-assert reset
@@ -78,7 +78,7 @@ class LMK04828Mg(LMK04828):
clkout_div_val = self.divide_to_reg(self.clkout_divider)
clkout_cnt_val = self.divide_to_cnth_cntl_reg(self.clkout_divider)
- self.log.debug("Register Initialization Commencing...")
+ self.log.trace("Register Initialization Commencing...")
self.pokes8((
(0x100, clkout_div_val), # CLKout Config
(0x101, clkout_cnt_val), # CLKout Config