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author | Moritz Fischer <moritz.fischer@ettus.com> | 2018-01-25 10:46:17 -0800 |
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committer | Ashish Chaudhari <ashish.chaudhari@ettus.com> | 2018-02-07 16:47:50 -0800 |
commit | 2e6146707bcdbcb047f58b0f6e3199c612a598a2 (patch) | |
tree | 635575813d13a3e0adda709c4fb67ac42ee32575 /mpm | |
parent | be0df323ca8eccee6abb19d54ebdd0cbbe12d9a4 (diff) | |
download | uhd-2e6146707bcdbcb047f58b0f6e3199c612a598a2.tar.gz uhd-2e6146707bcdbcb047f58b0f6e3199c612a598a2.tar.bz2 uhd-2e6146707bcdbcb047f58b0f6e3199c612a598a2.zip |
mpm: magnesium_update_cpld.py: Add axi_bitq support
Add axi_bitq support. In order for this to work we need several
conditions to be true:
- Updated openocd
- FPGA image with axi_bitq built in and hooked up to correct pins
- Updated overlays matching the FPGA image
- An svf file with correct max frequency <= 10MHz
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Diffstat (limited to 'mpm')
-rwxr-xr-x | mpm/python/usrp_mpm/dboard_manager/magnesium_update_cpld.py | 84 |
1 files changed, 65 insertions, 19 deletions
diff --git a/mpm/python/usrp_mpm/dboard_manager/magnesium_update_cpld.py b/mpm/python/usrp_mpm/dboard_manager/magnesium_update_cpld.py index e827062c2..25de75708 100755 --- a/mpm/python/usrp_mpm/dboard_manager/magnesium_update_cpld.py +++ b/mpm/python/usrp_mpm/dboard_manager/magnesium_update_cpld.py @@ -12,21 +12,31 @@ import argparse import subprocess import pyudev from usrp_mpm.mpmlog import get_logger - +from usrp_mpm.periph_manager.n310 import MboardRegsControl OPENOCD_DIR = "/usr/share/openocd/scripts" -REQUIRED_FILES = ["interface/sysfsgpio-ettus-magnesium-dba.cfg", - "interface/sysfsgpio-ettus-magnesium-dbb.cfg", - "cpld/altera-5m570z-cpld.cfg"] -OPENOCD_CMD = "init; svf -tap 5m570z.tap %s -progress -quiet;exit" - - -def check_openocd_files(logger=None): +CONFIGS = { 'sysfsgpio' : { + 'files' : ["interface/sysfsgpio-ettus-magnesium-dba.cfg", + "interface/sysfsgpio-ettus-magnesium-dbb.cfg", + "cpld/altera-5m570z-cpld.cfg"], + 'cmd' : "init; svf -tap 5m570z.tap %s -progress -quiet;exit" + } + , 'axi_bitq' : { + 'files' : ["cpld/altera-5m570z-cpld.cfg"], + 'cmd' : ["interface axi_bitq; axi_bitq_config %u %u; adapter_khz %u", + "init; svf -tap 5m570z.tap %s -progress -quiet;exit"] + } +} + +AXI_BITQ_ADAPTER_SPEED=8000 +AXI_BITQ_BUS_CLK=40000000 + +def check_openocd_files(files, logger=None): """ Check if all file required by OpenOCD exist :param logger: logger object """ - for ocd_file in REQUIRED_FILES: + for ocd_file in files: if not os.path.exists(os.path.join(OPENOCD_DIR, ocd_file)): if logger is not None: logger.error("Missing file %s" % os.path.join(OPENOCD_DIR, ocd_file)) @@ -51,8 +61,25 @@ def check_fpga_state(which=0): logger.error("Error while checking FPGA status: {}".format(ex)) return False +def find_axi_bitq_uio(dboard): + assert(dboard < 2 and dboard >= 0) + label = 'dboard-jtag-%u' % dboard + + logger = get_logger('update_cpld') -def do_update_cpld(filename, daughterboards, force=False): + try: + context = pyudev.Context() + uios = [dev for dev in context.list_devices(subsystem="uio")] + for uio in uios: + l = uio.attributes.asstring('maps/map0/name') + logger.trace("UIO label: {}, match: {} number: {}".format(l, l == label, uio.sys_number)) + if (l == label): + return int(uio.sys_number) + except OSError as ex: + logger.error("Error while looking for axi_bitq uio nodes: {}".format(ex)) + return None + +def do_update_cpld(filename, daughterboards): """ Carry out update process for the CPLD :param filename: path (on device) to the new CPLD image @@ -71,12 +98,21 @@ def do_update_cpld(filename, daughterboards, force=False): logger.error("CPLD image file {} not found".format(filename)) return False + # If we don't want to force this, check that the FPGA is operational - if not force and not check_fpga_state(): + if not check_fpga_state(): logger.error("CPLD lines are routed through fabric, FPGA is not programmed, giving up") return False - if check_openocd_files(logger=logger): + regs = MboardRegsControl('mboard-regs', logger) + compat_maj = regs.get_compat_number()[0] + mode = 'axi_bitq' if compat_maj > 3 else 'sysfsgpio' + + logger.info("FPGA has compatibilty number {} using {}".format(compat_maj, mode)) + + config = CONFIGS[mode] + + if check_openocd_files(config['files'], logger=logger): logger.trace("Found required OpenOCD files.") else: # check_openocd_files logs errors @@ -84,10 +120,22 @@ def do_update_cpld(filename, daughterboards, force=False): for dboard in daughterboards: logger.info("Updating daughterboard slot {}...".format(dboard)) - cmd = ["openocd", - "-f", (REQUIRED_FILES[int(dboard, 10)]).strip(), - "-f", (REQUIRED_FILES[2]).strip(), - "-c", OPENOCD_CMD % filename] + + if mode == 'sysfsgpio': + cmd = ["openocd", + "-f", (config['files'][int(dboard, 10)]).strip(), + "-f", (config['files'][2]).strip(), + "-c", config['cmd'] % filename] + else: + uio_id = find_axi_bitq_uio(int(dboard, 10)) + if not uio_id: + logger.error("Failed to find axi_bitq uio devices, make sure overlays are up to date") + continue + cmd = ["openocd", + "-c", config['cmd'][0] % (uio_id, AXI_BITQ_BUS_CLK, AXI_BITQ_ADAPTER_SPEED), + "-f", (config['files'][0]).strip(), + "-c", config['cmd'][1] % filename] + logger.trace("Update CPLD CMD: {}".format(" ".join(cmd))) subprocess.call(cmd) @@ -110,8 +158,6 @@ def main(): parser.add_argument("--file", help="Filename of CPLD image", default="/lib/firmware/ni/cpld-magnesium-revc.svf") parser.add_argument("--dboards", help="Slot name to program", default="0,1") - parser.add_argument("--force", help="Ignore issues and move on", - default=False, action="store_true") return parser.parse_args() args = parse_args() @@ -120,7 +166,7 @@ def main(): log.error("Unsupported dboards requested: {}".format(dboards)) return False else: - return do_update_cpld(args.file, dboards, args.force) + return do_update_cpld(args.file, dboards) if __name__ == "__main__": exit(not main()) |