diff options
| author | Trung Tran <trung.tran@ettus.com> | 2017-11-27 05:33:21 -0800 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2017-12-22 15:05:07 -0800 |
| commit | 201761cfa6d30ecc4d8951ed64e6fb7fce28c83d (patch) | |
| tree | b151064ed05a4da6fe1a4557b2c44de4e673b728 /mpm | |
| parent | 2467deeb17774bae03b1be01d1bc3454aa387948 (diff) | |
| download | uhd-201761cfa6d30ecc4d8951ed64e6fb7fce28c83d.tar.gz uhd-201761cfa6d30ecc4d8951ed64e6fb7fce28c83d.tar.bz2 uhd-201761cfa6d30ecc4d8951ed64e6fb7fce28c83d.zip | |
mpm: mg: Set default master_clock_rate to 125 MHz at every init
Diffstat (limited to 'mpm')
| -rw-r--r-- | mpm/python/usrp_mpm/dboard_manager/magnesium.py | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/mpm/python/usrp_mpm/dboard_manager/magnesium.py b/mpm/python/usrp_mpm/dboard_manager/magnesium.py index 3841a4466..3206f4829 100644 --- a/mpm/python/usrp_mpm/dboard_manager/magnesium.py +++ b/mpm/python/usrp_mpm/dboard_manager/magnesium.py @@ -518,6 +518,8 @@ class Magnesium(DboardManagerBase): if 'master_clock_rate' in args: self.master_clock_rate = float(args['master_clock_rate']) assert self.master_clock_rate in (122.88e6, 125e6, 153.6e6) + else: + self.master_clock_rate = 125e6 self.log.trace("Creating jesdcore object") self.jesdcore = nijesdcore.NIMgJESDCore(self.dboard_ctrl_regs, self.slot_idx) |