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authorMichael Dickens <michael.dickens@ettus.com>2021-08-20 11:31:35 -0400
committerAaron Rossetto <aaron.rossetto@ni.com>2021-08-24 15:27:35 -0500
commitfc864f36758b08f0c90970e5b54433667b1f038c (patch)
tree4d9077e525a916bfc196bc3f7346aeea36f21aa4 /mpm/python/usrp_mpm
parent8697826604c7dee5256540d50c0b47370fe8f27c (diff)
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MPM: add X410 support for 250e6 master clock rate
Diffstat (limited to 'mpm/python/usrp_mpm')
-rw-r--r--mpm/python/usrp_mpm/periph_manager/x4xx_rfdc_ctrl.py1
1 files changed, 1 insertions, 0 deletions
diff --git a/mpm/python/usrp_mpm/periph_manager/x4xx_rfdc_ctrl.py b/mpm/python/usrp_mpm/periph_manager/x4xx_rfdc_ctrl.py
index 874e4b5db..be93a495e 100644
--- a/mpm/python/usrp_mpm/periph_manager/x4xx_rfdc_ctrl.py
+++ b/mpm/python/usrp_mpm/periph_manager/x4xx_rfdc_ctrl.py
@@ -56,6 +56,7 @@ class X4xxRfdcCtrl:
122.88e6*4: (2.94912e9, 2, False, False), # RF (1M-8G)
122.88e6*2: (2.94912e9, 2, False, True), # RF (1M-8G)
122.88e6*1: (2.94912e9, 8, False, False), # RF (1M-8G)
+ 125e6*2: (3.00000e9, 2, False, True), # RF (1M-8G)
125e6*4: (3.00000e9, 2, False, False), # RF (1M-8G)
200e6: (3.00000e9, 4, True, False), # RF (Legacy Mode)
})