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authorDaniel Jepson <daniel.jepson@ni.com>2018-04-03 16:11:43 -0500
committerMartin Braun <martin.braun@ettus.com>2018-04-03 17:02:13 -0700
commit0430819e47e89afdf2f382f53f5730900a2339fe (patch)
treeafb3233a42cc76ee82de52b9996e47699670c3e3 /mpm/python/usrp_mpm
parent70c3d494eccdfe6dfc3e08237211cb20bd562621 (diff)
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fixup! n3xx: add White Rabbit support
Diffstat (limited to 'mpm/python/usrp_mpm')
-rw-r--r--mpm/python/usrp_mpm/periph_manager/n3xx.py12
1 files changed, 0 insertions, 12 deletions
diff --git a/mpm/python/usrp_mpm/periph_manager/n3xx.py b/mpm/python/usrp_mpm/periph_manager/n3xx.py
index 726f978f8..da3ecd296 100644
--- a/mpm/python/usrp_mpm/periph_manager/n3xx.py
+++ b/mpm/python/usrp_mpm/periph_manager/n3xx.py
@@ -419,18 +419,6 @@ class MboardRegsControl(object):
))
return ""
- def get_sfp0_link_status(self):
- """
- Reads the type of the FPGA image currently loaded
- Returns a string with the type (ie HG, XG, AA, etc.)
- """
- with self.regs.open():
- sfp0_info_rb = self.peek32(self.MB_SFP0_INFO)
- # Print the registers values as 32-bit hex values
- self.log.trace("SFP0 Info: 0x{0:0{1}X}".format(sfp0_info_rb, 8))
- sfp0_link = bool((sfp0_info_rb & 0x00010000) >> 16)
- return sfp0_link
-
###############################################################################
# Transport managers