diff options
author | Samuel O'Brien <sam.obrien@ni.com> | 2020-07-21 14:20:24 -0500 |
---|---|---|
committer | Aaron Rossetto <aaron.rossetto@ni.com> | 2020-10-08 07:44:12 -0500 |
commit | ee9085a494d6f5030e49f5a47aff6a84008e0852 (patch) | |
tree | 1234c4a6aa5c88f3df290c1586e69e4a91d24f7d /mpm/python/usrp_mpm/periph_manager/sim.py | |
parent | f54a22c60a0cbe990c9d3892f4c565d64226196b (diff) | |
download | uhd-ee9085a494d6f5030e49f5a47aff6a84008e0852.tar.gz uhd-ee9085a494d6f5030e49f5a47aff6a84008e0852.tar.bz2 uhd-ee9085a494d6f5030e49f5a47aff6a84008e0852.zip |
sim: Simulator CHDR Parsing and RFNoC Graph
This commit adds a simulated RFNoC Graph to the simulator. It is also
able to process management and control packets which can traverse the
graph and read from simulated registers. Stub callbacks for creating
streams have been provided but are not implemented yet.
Signed-off-by: Samuel O'Brien <sam.obrien@ni.com>
Diffstat (limited to 'mpm/python/usrp_mpm/periph_manager/sim.py')
-rw-r--r-- | mpm/python/usrp_mpm/periph_manager/sim.py | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/mpm/python/usrp_mpm/periph_manager/sim.py b/mpm/python/usrp_mpm/periph_manager/sim.py index 7c8baeb8f..7f9a610a7 100644 --- a/mpm/python/usrp_mpm/periph_manager/sim.py +++ b/mpm/python/usrp_mpm/periph_manager/sim.py @@ -16,6 +16,7 @@ from usrp_mpm.mpmlog import get_logger from usrp_mpm.rpc_server import no_claim from usrp_mpm.periph_manager import PeriphManagerBase from usrp_mpm.simulator.sim_dboard_catalina import SimulatedCatalinaDboard +from usrp_mpm.simulator.chdr_sniffer import ChdrSniffer CLOCK_SOURCE_INTERNAL = "internal" @@ -67,8 +68,6 @@ class sim(PeriphManagerBase): """ ######################################################################### # Overridables - # - # See PeriphManagerBase for documentation on these fields ######################################################################### description = "E320-Series Device - SIMULATED" pids = {0xE320: 'e320'} @@ -84,6 +83,8 @@ class sim(PeriphManagerBase): super().__init__() self.device_id = 1 + self.chdr_sniffer = ChdrSniffer(self.log, args) + # Unlike the real hardware drivers, if there is an exception here, # we just crash. No use missing an error when testing. self._init_peripherals(args) @@ -91,8 +92,9 @@ class sim(PeriphManagerBase): if not args.get('skip_boot_init', False): self.init(args) - def _simulator_frequency(self, freq): - self.log.debug("Setting Simulator Sample Frequency to {}".format(freq)) + def _simulator_sample_rate(self, freq): + self.log.debug("Setting Simulator Sample Rate to {}".format(freq)) + self.chdr_endpoint.set_sample_rate(freq) @classmethod def generate_device_info(cls, eeprom_md, mboard_info, dboard_infos): @@ -148,7 +150,8 @@ class sim(PeriphManagerBase): self.log.debug("Device info: {}".format(self.device_info)) def _init_dboards(self, dboard_infos, override_dboard_pids, default_args): - self.dboards.append(SimulatedCatalinaDboard(E320_DBOARD_SLOT_IDX, self._simulator_frequency)) + self.dboards.append(SimulatedCatalinaDboard( + E320_DBOARD_SLOT_IDX, self._simulator_sample_rate)) self.log.info("Found %d daughterboard(s).", len(self.dboards)) ########################################################################### |