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author | Samuel O'Brien <sam.obrien@ni.com> | 2020-08-05 10:00:20 -0500 |
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committer | Aaron Rossetto <aaron.rossetto@ni.com> | 2020-10-28 15:25:48 -0500 |
commit | d42ddc804118b2e9120c84efd477f9f4b3f8472e (patch) | |
tree | 6fc552eedc9f04434b3efe223a0d0add858ebb1d /mpm/python/usrp_mpm/periph_manager/sim.py | |
parent | 57ca4235b1b634d8c487fe2f0928ecc79f1bdbe7 (diff) | |
download | uhd-d42ddc804118b2e9120c84efd477f9f4b3f8472e.tar.gz uhd-d42ddc804118b2e9120c84efd477f9f4b3f8472e.tar.bz2 uhd-d42ddc804118b2e9120c84efd477f9f4b3f8472e.zip |
sim: Support Streaming
This commit add support for both Tx and Rx streams to the simulator.
Signed-off-by: Samuel O'Brien <sam.obrien@ni.com>
Diffstat (limited to 'mpm/python/usrp_mpm/periph_manager/sim.py')
-rw-r--r-- | mpm/python/usrp_mpm/periph_manager/sim.py | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/mpm/python/usrp_mpm/periph_manager/sim.py b/mpm/python/usrp_mpm/periph_manager/sim.py index 20d2486c0..b5cc45807 100644 --- a/mpm/python/usrp_mpm/periph_manager/sim.py +++ b/mpm/python/usrp_mpm/periph_manager/sim.py @@ -143,8 +143,6 @@ class sim(PeriphManagerBase): self._xport_mgrs = { 'udp': SimXportMgrUDP(self.log, args, SimEthDispatcher) } - #TODO: Actually create transports here when RFNoC is integrated - self.log.trace("CHDR transport creation was skipped") # Init complete. self.log.debug("Device info: {}".format(self.device_info)) @@ -174,6 +172,7 @@ class sim(PeriphManagerBase): this motherboard. """ self.device_id = device_id + self.chdr_endpoint.set_device_id(device_id) def get_device_id(self): """ |