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| author | RobertWalstab <robert.walstab@gmail.com> | 2020-07-24 16:31:45 +0200 |
|---|---|---|
| committer | Aaron Rossetto <aaron.rossetto@ni.com> | 2020-07-24 15:24:14 -0500 |
| commit | 54d698e3707cf1be5d38537db783ebadd850e729 (patch) | |
| tree | fbe89e9fb713412dd1016131bec7baffbc664163 /mpm/python/usrp_mpm/periph_manager/e31x.py | |
| parent | 5023e66b2dc46730f66f3c471fcfe0fc6bbf1200 (diff) | |
| download | uhd-54d698e3707cf1be5d38537db783ebadd850e729.tar.gz uhd-54d698e3707cf1be5d38537db783ebadd850e729.tar.bz2 uhd-54d698e3707cf1be5d38537db783ebadd850e729.zip | |
fpga, mpm: Bump FPGA compat number
Diffstat (limited to 'mpm/python/usrp_mpm/periph_manager/e31x.py')
| -rw-r--r-- | mpm/python/usrp_mpm/periph_manager/e31x.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/mpm/python/usrp_mpm/periph_manager/e31x.py b/mpm/python/usrp_mpm/periph_manager/e31x.py index 8043fc704..11f65dd17 100644 --- a/mpm/python/usrp_mpm/periph_manager/e31x.py +++ b/mpm/python/usrp_mpm/periph_manager/e31x.py @@ -31,7 +31,7 @@ E310_DEFAULT_CLOCK_SOURCE = 'internal' E310_DEFAULT_TIME_SOURCE = 'internal' E310_DEFAULT_ENABLE_FPGPIO = True E310_DEFAULT_DONT_RELOAD_FPGA = False # False means idle image gets reloaded -E310_FPGA_COMPAT = (5, 0) +E310_FPGA_COMPAT = (6, 0) E310_DBOARD_SLOT_IDX = 0 E310_GPIO_SRC_PS = "PS" # We use the index positions of RFA and RFB to map between name and radio index |