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authorLars Amsel <lars.amsel@ni.com>2021-06-04 08:27:50 +0200
committerAaron Rossetto <aaron.rossetto@ni.com>2021-06-10 12:01:53 -0500
commit2a575bf9b5a4942f60e979161764b9e942699e1e (patch)
tree2f0535625c30025559ebd7494a4b9e7122550a73 /mpm/python/usrp_mpm/periph_manager/CMakeLists.txt
parente17916220cc955fa219ae37f607626ba88c4afe3 (diff)
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uhd: Add support for the USRP X410
Co-authored-by: Lars Amsel <lars.amsel@ni.com> Co-authored-by: Michael Auchter <michael.auchter@ni.com> Co-authored-by: Martin Braun <martin.braun@ettus.com> Co-authored-by: Paul Butler <paul.butler@ni.com> Co-authored-by: Cristina Fuentes <cristina.fuentes-curiel@ni.com> Co-authored-by: Humberto Jimenez <humberto.jimenez@ni.com> Co-authored-by: Virendra Kakade <virendra.kakade@ni.com> Co-authored-by: Lane Kolbly <lane.kolbly@ni.com> Co-authored-by: Max Köhler <max.koehler@ni.com> Co-authored-by: Andrew Lynch <andrew.lynch@ni.com> Co-authored-by: Grant Meyerhoff <grant.meyerhoff@ni.com> Co-authored-by: Ciro Nishiguchi <ciro.nishiguchi@ni.com> Co-authored-by: Thomas Vogel <thomas.vogel@ni.com>
Diffstat (limited to 'mpm/python/usrp_mpm/periph_manager/CMakeLists.txt')
-rw-r--r--mpm/python/usrp_mpm/periph_manager/CMakeLists.txt13
1 files changed, 12 insertions, 1 deletions
diff --git a/mpm/python/usrp_mpm/periph_manager/CMakeLists.txt b/mpm/python/usrp_mpm/periph_manager/CMakeLists.txt
index 747b8967a..1ca96f53e 100644
--- a/mpm/python/usrp_mpm/periph_manager/CMakeLists.txt
+++ b/mpm/python/usrp_mpm/periph_manager/CMakeLists.txt
@@ -1,5 +1,5 @@
#
-# Copyright 2017-2018 Ettus Research, a National Instruments Company
+# Copyright 2017-2019 Ettus Research, a National Instruments Company
#
# SPDX-License-Identifier: GPL-3.0-or-later
#
@@ -18,6 +18,17 @@ set(USRP_MPM_PERIPHMGR_FILES
${CMAKE_CURRENT_SOURCE_DIR}/e320_periphs.py
${CMAKE_CURRENT_SOURCE_DIR}/e31x.py
${CMAKE_CURRENT_SOURCE_DIR}/e31x_periphs.py
+ ${CMAKE_CURRENT_SOURCE_DIR}/x4xx.py
+ ${CMAKE_CURRENT_SOURCE_DIR}/x4xx_periphs.py
+ ${CMAKE_CURRENT_SOURCE_DIR}/x4xx_clk_aux.py
+ ${CMAKE_CURRENT_SOURCE_DIR}/x4xx_clk_mgr.py
+ ${CMAKE_CURRENT_SOURCE_DIR}/x4xx_sample_pll.py
+ ${CMAKE_CURRENT_SOURCE_DIR}/x4xx_reference_pll.py
+ ${CMAKE_CURRENT_SOURCE_DIR}/x4xx_update_cpld.py
+ ${CMAKE_CURRENT_SOURCE_DIR}/x4xx_gps_mgr.py
+ ${CMAKE_CURRENT_SOURCE_DIR}/x4xx_mb_cpld.py
+ ${CMAKE_CURRENT_SOURCE_DIR}/x4xx_rfdc_regs.py
+ ${CMAKE_CURRENT_SOURCE_DIR}/x4xx_rfdc_ctrl.py
${CMAKE_CURRENT_SOURCE_DIR}/sim.py
)
list(APPEND USRP_MPM_FILES ${USRP_MPM_PERIPHMGR_FILES})