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| author | Daniel Jepson <daniel.jepson@ni.com> | 2017-12-01 10:50:04 -0600 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2017-12-22 15:05:57 -0800 |
| commit | d7c6c352165fb327fe002a6dd94c3741dc3528f9 (patch) | |
| tree | b87087a7d36202f5ffb43fa6d0e0c9068e2207e9 /mpm/python/usrp_mpm/dboard_manager | |
| parent | b0a045f06971633a78985605895b0810cf28cb2f (diff) | |
| download | uhd-d7c6c352165fb327fe002a6dd94c3741dc3528f9.tar.gz uhd-d7c6c352165fb327fe002a6dd94c3741dc3528f9.tar.bz2 uhd-d7c6c352165fb327fe002a6dd94c3741dc3528f9.zip | |
mpm: add all time_source options and complete MB clk control
- complete time_source options to match updates to fpga registers
- add methods for each of the bitfields in the clock control register
- add init sequences for the meas_clk MMCM and PPS output
Reviewed-By: Martin Braun <martin.braun@ettus.com>
Diffstat (limited to 'mpm/python/usrp_mpm/dboard_manager')
0 files changed, 0 insertions, 0 deletions