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authorMartin Braun <martin.braun@ettus.com>2018-03-06 15:16:22 -0800
committerMartin Braun <martin.braun@ettus.com>2018-03-06 15:28:33 -0800
commited2d1ac3e47f107ebef8845130ad60ea2777443c (patch)
treebfc80a509dc4855f62d69f032cea02ce9fee0b95 /mpm/python/usrp_mpm/dboard_manager/eiscat.py
parent38a7bcbff496ad1097c158ae1ba847abeab6d144 (diff)
downloaduhd-ed2d1ac3e47f107ebef8845130ad60ea2777443c.tar.gz
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mpm: Demote some log messages
The log output at level 'INFO' was pretty cluttered. This cleans up the log messages at the higher levels. In some cases, log message typos or capitalizations were also fixed.
Diffstat (limited to 'mpm/python/usrp_mpm/dboard_manager/eiscat.py')
-rw-r--r--mpm/python/usrp_mpm/dboard_manager/eiscat.py18
1 files changed, 9 insertions, 9 deletions
diff --git a/mpm/python/usrp_mpm/dboard_manager/eiscat.py b/mpm/python/usrp_mpm/dboard_manager/eiscat.py
index 2b1c247ba..3581784ea 100644
--- a/mpm/python/usrp_mpm/dboard_manager/eiscat.py
+++ b/mpm/python/usrp_mpm/dboard_manager/eiscat.py
@@ -71,7 +71,7 @@ class ADS54J56(object):
else:
self.sync_line = "AB"
assert self.sync_line in ('AB', 'CD')
- self.log.debug(
+ self.log.trace(
"The next setup() sequence will use sync pin: {}".format(
self.sync_line
)
@@ -513,25 +513,25 @@ class EISCAT(DboardManagerBase):
self.log.debug("Residual DAC offset error: {} ps.".format(
offset_error*1e12
))
- self.log.info("Clock Synchronization Complete!")
+ self.log.debug("Clock Synchronization Complete!")
# Go, go, go!
if args.get("force_init", False):
self.log.info("Forcing re-initialization of dboard.")
self.initialized = args.get("force_init", self.initialized)
if self.initialized:
- self.log.info(
+ self.log.debug(
"Dboard was previously initialized; skipping init. " \
"Specify force_init=1 to force initialization."
)
return True
- self.log.info("init() called with args `{}'".format(
+ self.log.debug("init() called with args `{}'".format(
",".join(['{}={}'.format(x, args[x]) for x in args])
))
self.radio_regs = _init_dboard_regs()
self.jesd_cores = _init_jesd_cores(self.radio_regs, self.slot_idx)
- self.log.info("Radio-register UIO object successfully generated!")
+ self.log.debug("Radio-register UIO object successfully generated!")
self._spi_ifaces = _init_spi_devices() # Chips don't have power yet!
- self.log.info("Loaded SPI interfaces!")
+ self.log.debug("Loaded SPI interfaces!")
self._init_power(self.radio_regs) # Now, we can talk to chips via SPI
self.dboard_clk_control = _init_clock_control(self.radio_regs)
self.lmk = _init_lmk(
@@ -546,7 +546,7 @@ class EISCAT(DboardManagerBase):
for spi_iface in ('adc0', 'adc1')
]
self.dboard_clk_control.enable_mmcm()
- self.log.info("Clocking Configured Successfully!")
+ self.log.debug("Clocking Configured Successfully!")
# Synchronize DB Clocks
self.clock_synchronizer = ClockSynchronizer(
self.radio_regs,
@@ -618,7 +618,7 @@ class EISCAT(DboardManagerBase):
return True
for adc in self.adcs:
adc.setup()
- self.log.info("ADC Initialization Complete!")
+ self.log.debug("ADC Initialization Complete!")
for jesd_core in self.jesd_cores:
jesd_core.init_deframer()
return True
@@ -649,7 +649,7 @@ class EISCAT(DboardManagerBase):
if error:
return False
- self.log.info("JESD Core Initialized, link up! (woohoo!)")
+ self.log.debug("JESD Core Initialized, link up! (woohoo!)")
self.initialized = True
return self.initialized