Initial commit for N3xx development.

- Creates mpm/ subdirectory
- First pass at hardware daemon/MPM
- New code for LMK04828, AD9371
- spidev integration

Contributions by:

Martin Braun <martin.braun@ettus.com>
Derek Kozel <derek.kozel@ettus.com>
Mark Meserve <mark.meserve@ni.com>
Andrej Rode <andrej.rode@ettus.com>

8 files changed, 422 insertions, 0 deletions

diff --git a/mpm/lib/spi/CMakeLists.txt b/mpm/lib/spi/CMakeLists.txt
new file mode 100644
index 000000000..b84c0de73
--- /dev/null
+++ b/mpm/lib/spi/CMakeLists.txt
@@ -0,0 +1,8 @@
+SET(SPI_SOURCES
+    ${CMAKE_CURRENT_SOURCE_DIR}/spi_lock.cpp
+    ${CMAKE_CURRENT_SOURCE_DIR}/spi_config.cpp
+    ${CMAKE_CURRENT_SOURCE_DIR}/mock_spi.cpp
+    ${CMAKE_CURRENT_SOURCE_DIR}/spidev_iface.cpp
+)
+
+USRP_PERIPHS_ADD_OBJECT(spi ${SPI_SOURCES})
diff --git a/mpm/lib/spi/mock_spi.cpp b/mpm/lib/spi/mock_spi.cpp
new file mode 100644
index 000000000..2508de3ce
--- /dev/null
+++ b/mpm/lib/spi/mock_spi.cpp
@@ -0,0 +1,117 @@
+//
+// Copyright 2014 Ettus Research (National Instruments)
+//
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program.  If not, see <http://www.gnu.org/licenses/>.
+//
+
+/*
+#include <uhd/config.hpp>
+#include <uhd/exception.hpp>
+#include "n310_spi.h"
+
+#include <fcntl.h>
+#include <sys/ioctl.h>
+#include <linux/types.h>
+#include <linux/spi/spidev.h>
+
+
+class spidev_impl : public spi
+{
+public:
+    
+    spidev_impl(const std::string &device)
+        : _mode(SPI_CPHA),
+        _speed(2000000),
+        _bits(8),
+        _delay(0)
+    {
+        int ret;
+        _fd = open(device.c_str(), O_RDWR);
+        if (_fd < 0)
+            throw uhd::runtime_error(str(boost::format("Could not open spidev device %s") % device));
+
+        ret = ioctl(_fd, SPI_IOC_WR_MODE, &_mode);
+        if (ret == -1)
+            throw uhd::runtime_error("Could not set spidev mode");
+
+        ret = ioctl(_fd, SPI_IOC_RD_MODE, &_mode);
+        if (ret == -1)
+            throw uhd::runtime_error("Could not get spidev mode");
+
+        ret = ioctl(_fd, SPI_IOC_WR_BITS_PER_WORD, &_bits);
+        if (ret == -1)
+            throw uhd::runtime_error("Could not set spidev bits per word");
+
+        ret = ioctl(_fd, SPI_IOC_RD_BITS_PER_WORD, &_bits);
+        if (ret == -1)
+            throw uhd::runtime_error("Could not get spidev bits per word");
+
+        ret = ioctl(_fd, SPI_IOC_WR_MAX_SPEED_HZ, &_speed);
+        if (ret == -1)
+            throw uhd::runtime_error("Could not set spidev max speed");
+
+        ret = ioctl(_fd, SPI_IOC_RD_MAX_SPEED_HZ, &_speed);
+        if (ret == -1)
+            throw uhd::runtime_error("Could not get spidev max speed");
+    }
+
+    virtual ~spidev_impl()
+    {
+        close(_fd);
+    }
+
+    uint32_t transact_spi(int, const uhd::spi_config_t &,
+        uint32_t data, size_t num_bits,
+        bool)
+    {
+        int ret(0);
+        struct spi_ioc_transfer tr;
+
+        uint8_t *tx_data = reinterpret_cast<uint8_t *>(&data);
+
+
+        UHD_ASSERT_THROW(num_bits == 24);
+        uint8_t tx[] = { tx_data[2], tx_data[1], tx_data[0] };
+
+        uint8_t rx[3];
+        tr.tx_buf = (unsigned long)&tx[0];
+        tr.rx_buf = (unsigned long)&rx[0];
+        tr.len = num_bits >> 3;
+        tr.bits_per_word = _bits;
+        tr.tx_nbits = 1;
+        tr.rx_nbits = 1;
+        tr.speed_hz = _speed;
+        tr.delay_usecs = _delay;
+
+        ret = ioctl(_fd, SPI_IOC_MESSAGE(1), &tr);
+        if (ret < 1)
+            throw uhd::runtime_error("Could not send spidev message");
+
+        return rx[2];
+    }
+
+private:
+    int _fd;
+    uint8_t _mode;
+    uint32_t _speed;
+    uint8_t _bits;
+    uint16_t _delay;
+    
+};
+
+spi::sptr spi::make(const std::string &device)
+{
+    return spi::sptr(new spidev_impl(device));
+}
+*/
\ No newline at end of file
diff --git a/mpm/lib/spi/mock_spi.h b/mpm/lib/spi/mock_spi.h
new file mode 100644
index 000000000..c289faa16
--- /dev/null
+++ b/mpm/lib/spi/mock_spi.h
@@ -0,0 +1,10 @@
+#pragma once
+
+#include <uhd/types/serial.hpp>
+
+class mock_spi : public virtual uhd::spi_iface
+{
+public:
+    typedef boost::shared_ptr<spi> sptr;
+    static sptr make(const std::string &device);
+};
diff --git a/mpm/lib/spi/spi_config.cpp b/mpm/lib/spi/spi_config.cpp
new file mode 100644
index 000000000..69d6d9c2a
--- /dev/null
+++ b/mpm/lib/spi/spi_config.cpp
@@ -0,0 +1,37 @@
+#include "spi_config.h"
+
+
+spi_config_t::spi_config_t(const spi_hwd_settings_t hwd_settings, const spi_device_settings_t device_settings) :
+    full_settings({
+        _convert_to_adi_settings(hwd_settings.chip_select_index, device_settings),
+        hwd_settings })
+{
+
+}
+
+spiSettings_t spi_config_t::_convert_to_adi_settings(const uint8_t chip_select_index, const spi_device_settings_t device_settings)
+{
+    return {
+        chip_select_index,
+        device_settings.writeBitPolarity,
+        device_settings.longInstructionWord,
+        device_settings.MSBFirst,
+        device_settings.CPHA,
+        device_settings.CPOL,
+        device_settings.enSpiStreaming,
+        device_settings.autoIncAddrUp,
+        device_settings.fourWireMode,
+        device_settings.spiClkFreq_Hz,
+    };
+}
+
+const spiSettings_t* spi_config_t::get_spi_settings() const
+{
+    return &(full_settings.adi_settings);
+}
+
+const spi_full_settings_t* spi_config_t::recover_full_spi_settings(const spiSettings_t* settings)
+{
+    // TODO: make this better
+    return reinterpret_cast<const spi_full_settings_t*>(settings);
+}
diff --git a/mpm/lib/spi/spi_config.h b/mpm/lib/spi/spi_config.h
new file mode 100644
index 000000000..a29a9bc64
--- /dev/null
+++ b/mpm/lib/spi/spi_config.h
@@ -0,0 +1,44 @@
+#pragma once
+
+#include "../mykonos/adi/common.h"
+
+// contains information about the spi configuration
+
+struct spi_device_settings_t
+{
+    uint8_t writeBitPolarity;
+    uint8_t longInstructionWord;    ///< 1 = 16bit instruction word, 0 = 8bit instruction word
+    uint8_t MSBFirst;               ///< 1 = MSBFirst, 0 = LSBFirst
+    uint8_t CPHA;                   ///< clock phase, sets which clock edge the data updates (valid 0 or 1)
+    uint8_t CPOL;                   ///< clock polarity 0 = clock starts low, 1 = clock starts high
+    uint8_t enSpiStreaming;         ///< Not implemented. SW feature to improve SPI throughput.
+    uint8_t autoIncAddrUp;          ///< Not implemented. For SPI Streaming, set address increment direction. 1= next addr = addr+1, 0:addr = addr-1
+    uint8_t fourWireMode;           ///< 1: Use 4-wire SPI, 0: 3-wire SPI (SDIO pin is bidirectional). NOTE: ADI's FPGA platform always uses 4-wire mode.
+    uint32_t spiClkFreq_Hz;
+};
+
+struct spi_hwd_settings_t
+{
+    uint8_t spidev_index;
+    uint8_t chip_select_index;
+};
+
+struct spi_full_settings_t
+{
+    spiSettings_t adi_settings;
+    spi_hwd_settings_t hwd_settings;
+};
+
+class spi_config_t
+{
+public:
+    spi_config_t(spi_hwd_settings_t hwd_settings, spi_device_settings_t device_settings);
+
+private:
+    const spi_full_settings_t full_settings;
+    static spiSettings_t _convert_to_adi_settings(uint8_t chip_select_index, spi_device_settings_t device_settings);
+
+public:
+    const spiSettings_t* get_spi_settings() const;
+    static const spi_full_settings_t* recover_full_spi_settings(const spiSettings_t* settings);
+};
diff --git a/mpm/lib/spi/spi_lock.cpp b/mpm/lib/spi/spi_lock.cpp
new file mode 100644
index 000000000..1796de46a
--- /dev/null
+++ b/mpm/lib/spi/spi_lock.cpp
@@ -0,0 +1,26 @@
+#include "spi_lock.h"
+
+spi_lock::spi_lock(uint8_t spidev_index) :
+    spidev_index(spidev_index)
+{
+
+}
+
+uint8_t spi_lock::get_spidev() const
+{
+    return spidev_index;
+}
+
+void spi_lock::lock()
+{
+    spi_mutex.lock();
+}
+void spi_lock::unlock()
+{
+    spi_mutex.unlock();
+}
+
+spi_lock::sptr spi_lock::make(uint8_t spidev_index)
+{
+    return std::make_shared<spi_lock>(spidev_index);
+}
\ No newline at end of file
diff --git a/mpm/lib/spi/spi_lock.h b/mpm/lib/spi/spi_lock.h
new file mode 100644
index 000000000..55ddb0baf
--- /dev/null
+++ b/mpm/lib/spi/spi_lock.h
@@ -0,0 +1,25 @@
+#pragma once
+
+#include <boost/noncopyable.hpp>
+#include <memory>
+#include <mutex>
+
+class spi_lock : public boost::noncopyable
+{
+public:
+    using sptr = std::shared_ptr<spi_lock>;
+    static sptr make(uint8_t spidev_index);
+
+    spi_lock(uint8_t spidev_index);
+
+    uint8_t get_spidev() const;
+
+private:
+    const uint8_t spidev_index;
+
+    // BasicLockable implementation for lock_guard
+    mutable std::mutex spi_mutex;
+    friend class std::lock_guard<spi_lock>;
+    void lock();
+    void unlock();
+};
\ No newline at end of file
diff --git a/mpm/lib/spi/spidev_iface.cpp b/mpm/lib/spi/spidev_iface.cpp
new file mode 100644
index 000000000..7108759f8
--- /dev/null
+++ b/mpm/lib/spi/spidev_iface.cpp
@@ -0,0 +1,155 @@
+//
+// Copyright 2017 Ettus Research (National Instruments)
+//
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program.  If not, see <http://www.gnu.org/licenses/>.
+//
+
+#include "mpm/spi/spidev_iface.hpp"
+
+#include <fcntl.h>
+#include <sys/ioctl.h>
+#include <linux/types.h>
+#include <linux/spi/spidev.h>
+#include <boost/format.hpp>
+
+using namespace mpm::spi;
+
+/******************************************************************************
+ * Implementation
+ *****************************************************************************/
+class spidev_iface_impl : public spidev_iface
+{
+public:
+
+    spidev_iface_impl(
+            const std::string &device
+    ) {
+        int ret;
+
+        _fd = open(device.c_str(), O_RDWR);
+        if (_fd < 0) {
+            throw std::runtime_error(str(
+                    boost::format("Could not open spidev device %s")
+                    % device
+            ));
+        }
+
+        ret = ioctl(_fd, SPI_IOC_WR_MODE32, &_mode);
+        if (ret == -1) {
+            throw std::runtime_error("Could not set spidev mode");
+        }
+
+        ret = ioctl(_fd, SPI_IOC_RD_MODE32, &_mode);
+        if (ret == -1) {
+            throw std::runtime_error("Could not get spidev mode");
+        }
+
+        ret = ioctl(_fd, SPI_IOC_WR_BITS_PER_WORD, &_bits);
+        if (ret == -1) {
+            throw std::runtime_error("Could not set spidev bits per word");
+        }
+
+        ret = ioctl(_fd, SPI_IOC_RD_BITS_PER_WORD, &_bits);
+        if (ret == -1) {
+            throw std::runtime_error("Could not get spidev bits per word");
+        }
+
+        ret = ioctl(_fd, SPI_IOC_WR_MAX_SPEED_HZ, &_speed);
+        if (ret == -1) {
+            throw std::runtime_error("Could not set spidev max speed");
+        }
+
+        ret = ioctl(_fd, SPI_IOC_RD_MAX_SPEED_HZ, &_speed);
+        if (ret == -1) {
+            throw std::runtime_error("Could not get spidev max speed");
+        }
+    }
+
+    ~spidev_iface_impl()
+    {
+        close(_fd);
+    }
+
+    uint32_t transact_spi(
+            int /* which_slave */,
+            const uhd::spi_config_t & /* config */,
+            uint32_t data,
+            size_t num_bits,
+            bool readback
+    ) {
+        int ret(0);
+
+        uint8_t *tx_data = reinterpret_cast<uint8_t *>(&data);
+
+        assert(num_bits == 24);
+        uint8_t tx[] = {tx_data[2], tx_data[1], tx_data[0]};
+
+        uint8_t rx[3]; // Buffer length must match tx buffer
+
+        struct spi_ioc_transfer tr;
+        tr.tx_buf = (unsigned long) &tx[0];
+        tr.rx_buf = (unsigned long) &rx[0];
+        tr.len = num_bits >> 3;
+        tr.bits_per_word = _bits;
+        tr.tx_nbits = 1; // Standard SPI
+        tr.rx_nbits = 1; // Standard SPI
+        tr.speed_hz = _speed;
+        tr.delay_usecs = _delay;
+
+        ret = ioctl(_fd, SPI_IOC_MESSAGE(1), &tr);
+        if (ret < 1)
+            throw std::runtime_error("Could not send spidev message");
+
+        return rx[2]; // Assumes that only a single byte is being read.
+    }
+
+    uint32_t read_spi(
+            int which_slave,
+            const uhd::spi_config_t &config,
+            uint32_t data,
+            size_t num_bits
+    ) {
+        return transact_spi(
+                which_slave, config, data, num_bits, true
+        );
+    }
+
+    void write_spi(
+            int which_slave,
+            const uhd::spi_config_t &config,
+            uint32_t data,
+            size_t num_bits
+    ) {
+        transact_spi(
+                which_slave, config, data, num_bits, false
+        );
+    }
+
+private:
+    int _fd;
+    uint8_t _mode = SPI_CPHA | SPI_CPOL;
+    uint32_t _speed = 2000000;
+    uint8_t _bits = 8;
+    uint16_t _delay = 0;
+};
+
+/******************************************************************************
+ * Factory
+ *****************************************************************************/
+spidev_iface::sptr spidev_iface::make(
+        const std::string &device
+) {
+    return sptr(new spidev_iface_impl(device));
+}
+