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authorMark Meserve <mark.meserve@ni.com>2017-09-07 14:21:09 -0500
committerMartin Braun <martin.braun@ettus.com>2017-12-22 15:04:01 -0800
commit78331c42bf980da674a41a366f7c90cee73bc2cd (patch)
tree684c80caca224fe8676c88fcd90829d11bb5552c /mpm/lib/mykonos/adi/mykonos_gpio.c
parente4e5788a19105d0bf3a3a220611fd4469da6dac1 (diff)
downloaduhd-78331c42bf980da674a41a366f7c90cee73bc2cd.tar.gz
uhd-78331c42bf980da674a41a366f7c90cee73bc2cd.tar.bz2
uhd-78331c42bf980da674a41a366f7c90cee73bc2cd.zip
adi: update to API version 3565
Diffstat (limited to 'mpm/lib/mykonos/adi/mykonos_gpio.c')
-rw-r--r--mpm/lib/mykonos/adi/mykonos_gpio.c423
1 files changed, 180 insertions, 243 deletions
diff --git a/mpm/lib/mykonos/adi/mykonos_gpio.c b/mpm/lib/mykonos/adi/mykonos_gpio.c
index 2da33dcdb..8b5e6eb1a 100644
--- a/mpm/lib/mykonos/adi/mykonos_gpio.c
+++ b/mpm/lib/mykonos/adi/mykonos_gpio.c
@@ -3,17 +3,15 @@
*
*\brief Contains Mykonos APIs for transceiver GPIO configuration and control.
*
- * Mykonos API version: 1.3.1.3534
+ * Mykonos API version: 1.5.1.3565
*/
-
/**
- * \page Disclaimer Legal Disclaimer
- * WARRANTY DISCLAIMER: THE SOFTWARE AND ANY RELATED INFORMATION AND/OR ADVICE IS PROVIDED ON AN
- * “AS IS” BASIS, WITHOUT REPRESENTATIONS, GUARANTEES OR WARRANTIES OF ANY KIND, EXPRESS OR IMPLIED,
- * ORAL OR WRITTEN, INCLUDING WITHOUT LIMITATION, WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
- * PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT.
- */
+* \page Disclaimer Legal Disclaimer
+* Copyright 2015-2017 Analog Devices Inc.
+* Released under the AD9371 API license, for more information see the "LICENSE.txt" file in this zip file.
+*
+*/
#include <stdint.h>
#include <stddef.h>
@@ -222,9 +220,6 @@ const char* getGpioMykonosErrorMessage(mykonosGpioErr_t errorCode)
case MYKONOS_ERR_SET_ARMGPIO_PINS_INV_GPIOPIN:
return "Out of range GPIO pin detected \n";
- case MYKONOS_ERR_SET_RADIOCTRL_PINS_ARMERROR:
- return "ARM command Error in MYKONOS_setRadioControlPinMode()\n";
-
case MYKONOS_ERR_SETUPAUXDAC_INV_AUXDACCODE:
return "device->auxIo->auxDacValue, AUXDAC value out of range in MYKONOS_setupAuxDacs()\n";
@@ -270,6 +265,9 @@ const char* getGpioMykonosErrorMessage(mykonosGpioErr_t errorCode)
case MYKONOS_ERR_GAINCOMP_NULL_STRUCT:
return "gain compensation structure gainComp is not initialised in MYKONOS_getRxGainCompensation()\n";
+ case MYKONOS_ERR_GAINCOMP_EN_NULL_PARM:
+ return "enable is null pointer for the passed parameter in MYKONOS_getRxGainCompensation()\n";
+
case MYKONOS_ERR_GAINCOMP_SET_NULL_STRUCT:
return "gain compensation structure gainComp is not initialised in MYKONOS_setRxGainCompensation()\n";
@@ -429,6 +427,9 @@ const char* getGpioMykonosErrorMessage(mykonosGpioErr_t errorCode)
case MYKONOS_ERR_OBS_RX_GAINCOMP_NULL_STRUCT:
return "Observation channel gain compensation structure gainComp is not initialised in MYKONOS_getObsRxGainCompensation().\n";
+ case MYKONOS_ERR_OBS_RX_GAINCOMP_EN_NULL_PARAM:
+ return "enabled is null pointer for the parameter passed to MYKONOS_getObsRxGainCompensation().\n";
+
case MYKONOS_ERR_GETGPIODRV_NULL_PARAM:
return "Null parameter passed to the function MYKONOS_getGpioDrv().\n";
@@ -450,8 +451,11 @@ const char* getGpioMykonosErrorMessage(mykonosGpioErr_t errorCode)
case MYKONOS_ERR_SPI2_INV_GPIO:
return "if an invalid GPIO pin configuration is passed to MYKONOS_spi2GpioSetup().\n";
+ case MYKONOS_ERR_GET_GPIO_SOURCE_CONTROL_NULL_PARM:
+ return "Null parameter passed to the function MYKONOS_getGpioSourceCtrl().\n";
+
default:
- return "";
+ return "Unknown error was encountered.\n";
}
#endif
@@ -629,7 +633,7 @@ mykonosGpioErr_t MYKONOS_setRx1GainCtrlPin(mykonosDevice_t *device, uint8_t incS
if (enable > 0)
{
/* Error checking for correct step. */
- if ((incStep > MAX_STEP) | (decStep > MAX_STEP))
+ if ((uint8_t)(incStep > MAX_STEP) || (uint8_t)(decStep > MAX_STEP))
{
CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_MGCRX1_STEP_INV_PARAM,
getGpioMykonosErrorMessage(MYKONOS_ERR_MGCRX1_STEP_INV_PARAM));
@@ -665,7 +669,7 @@ mykonosGpioErr_t MYKONOS_setRx1GainCtrlPin(mykonosDevice_t *device, uint8_t incS
}
/* Setting increment step. */
- wrtStep = (incStep<<SHIFT_INC) | (decStep<<SHIFT_DEC) | (enable<<SHIFT_CH1);
+ wrtStep = (uint8_t)(incStep<<SHIFT_INC) | (uint8_t)(decStep<<SHIFT_DEC) | (uint8_t)(enable<<SHIFT_CH1);
/* Set the GPIO input pin configuration and the step size. */
CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_AGC_MANUAL_GAIN_CFG, wrtStep, 0xFD, 0);
@@ -837,7 +841,7 @@ mykonosGpioErr_t MYKONOS_setRx2GainCtrlPin(mykonosDevice_t *device, uint8_t incS
if (enable > 0)
{
/* Error checking for correct step. */
- if ((incStep > MAX_STEP) | (decStep > MAX_STEP))
+ if ((uint8_t)(incStep > MAX_STEP) || (uint8_t)(decStep > MAX_STEP))
{
CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_MGCRX2_STEP_INV_PARAM,
getGpioMykonosErrorMessage(MYKONOS_ERR_MGCRX2_STEP_INV_PARAM));
@@ -873,7 +877,7 @@ mykonosGpioErr_t MYKONOS_setRx2GainCtrlPin(mykonosDevice_t *device, uint8_t incS
}
/* Setting increment step. */
- wrtStep = (incStep<<SHIFT_INC) | (decStep<<SHIFT_DEC) | (enable<<SHIFT_CH2);
+ wrtStep = (uint8_t)(incStep<<SHIFT_INC) | (uint8_t)(decStep<<SHIFT_DEC) | (uint8_t)(enable<<SHIFT_CH2);
/* Set the GPIO input pin configuration and the step size. */
CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_AGC_MANUAL_GAIN_CFG, wrtStep, 0xFE, 0);
@@ -1691,7 +1695,7 @@ mykonosGpioErr_t MYKONOS_setTx1AttenCtrlPin(mykonosDevice_t *device, uint8_t ste
#endif
/* If enable then check for the next otherwise go directly to disable */
- if(enable > 0)
+ if (enable > 0)
{
/* Error checking for correct step. */
if (stepSize > TX_INCDEC_MASK)
@@ -1924,7 +1928,7 @@ mykonosGpioErr_t MYKONOS_setTx2AttenCtrlPin(mykonosDevice_t *device, uint8_t ste
#endif
/* If enable then check for the next otherwise go directly to disable */
- if(enable > 0)
+ if (enable > 0)
{
/* Error checking for correct step. */
if (stepSize > TX_INCDEC_MASK)
@@ -1967,8 +1971,8 @@ mykonosGpioErr_t MYKONOS_setTx2AttenCtrlPin(mykonosDevice_t *device, uint8_t ste
}
else
{
- /* Setting TPC mode corresponding for no Pin control */
- tpcMode = 0x05;
+ /* Setting TPC mode corresponding for no Pin control */
+ tpcMode = 0x05;
}
/* Setting increment step. */
@@ -2367,7 +2371,7 @@ mykonosGpioErr_t MYKONOS_setArmGpioPins(mykonosDevice_t *device)
CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setArmGpioPins()\n");
#endif
- if (device->auxIo->armGpio == 0)
+ if (device->auxIo->armGpio == NULL)
{
CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SET_ARMGPIO_INV_POINTER,
getGpioMykonosErrorMessage(MYKONOS_ERR_SET_ARMGPIO_INV_POINTER));
@@ -2413,8 +2417,8 @@ mykonosGpioErr_t MYKONOS_setArmGpioPins(mykonosDevice_t *device)
/* if output signal */
if ((signalId[i] >= RX1_ENABLE_ACK_SIGNALID) && (gpioConfig[2] != 0))
{
- gpioOe |= (((gpioConfig[2] >> 4) & 0x01) << (gpioConfig[2] & 0x0F)); /* 1 = output */
- gpioUsedMask |= (1 << (gpioConfig[2] & 0x0F));
+ gpioOe |= (uint32_t)(((gpioConfig[2] >> 4) & 0x01) << (gpioConfig[2] & 0x0F)); /* 1 = output */
+ gpioUsedMask |= (uint32_t)(1 << (gpioConfig[2] & 0x0F));
}
/* if input signal and orx Pin mode enabled - currently only input pins are orx pin mode control */
@@ -2423,15 +2427,15 @@ mykonosGpioErr_t MYKONOS_setArmGpioPins(mykonosDevice_t *device)
gpioUsedMask |= (1 << (gpioConfig[2] & 0x1F));
}
- retval = MYKONOS_sendArmCommand(device, MYKONOS_ARM_SET_OPCODE, &gpioConfig[0], sizeof(gpioConfig));
+ retval = (mykonosGpioErr_t)MYKONOS_sendArmCommand(device, MYKONOS_ARM_SET_OPCODE, &gpioConfig[0], sizeof(gpioConfig));
if (retval != MYKONOS_ERR_GPIO_OK)
{
return retval;
}
timeoutMs = 1000;
- retval = MYKONOS_waitArmCmdStatus(device, MYKONOS_ARM_SET_OPCODE, timeoutMs, &cmdStatusByte);
- if (retval != MYKONOS_ERR_GPIO_OK)
+
+ if (( retval = (mykonosGpioErr_t)MYKONOS_waitArmCmdStatus(device, MYKONOS_ARM_SET_OPCODE, timeoutMs, &cmdStatusByte)) != MYKONOS_ERR_GPIO_OK)
{
return retval;
}
@@ -2445,13 +2449,12 @@ mykonosGpioErr_t MYKONOS_setArmGpioPins(mykonosDevice_t *device)
}
/* Mykonos SPI regs to set GPIO OE direction only for pins used by ARM */
- retval = MYKONOS_setGpioOe(device, gpioOe, gpioUsedMask);
- if (retval != MYKONOS_ERR_GPIO_OK)
+ if ((retval = MYKONOS_setGpioOe(device, gpioOe, gpioUsedMask)) != MYKONOS_ERR_GPIO_OK)
{
return retval;
}
- //if any output pins enabled, write GPIO nibble source control. ARM outputs only allowed on GPIO[15:0]
+ /* if any output pins enabled, write GPIO nibble source control. ARM outputs only allowed on GPIO[15:0]*/
if (gpioOe & 0x000F)
{
CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_SOURCE_CONTROL_LOWER_BYTE, 0x09, 0x0F, 0);
@@ -2476,89 +2479,6 @@ mykonosGpioErr_t MYKONOS_setArmGpioPins(mykonosDevice_t *device)
}
/**
- * \brief Configures the Radio power up/down control for Rx and Tx paths to be controlled by pins
- * (TX1/2_ENABLE, RX1/2_ENABLE, and GPIO pins) or an API function call.
- *
- * The BBP should not have to call this as it will automatically be setup at the end of the
- * MYKONOS_loadArmFromBinary() function call. If the BBP wishes to change the radio power up/down
- * control method this function can be called again to change the configuration while
- * the ARM is in the radioOff state.
- *
- * <B>Dependencies</B>
- * - device->spiSettings->chipSelectIndex
- * - device->auxIo->armGpio->useRx2EnablePin
- * - device->auxIo->armGpio->useTx2EnablePin
- * - device->auxIo->armGpio->txRxPinMode
- * - device->auxIo->armGpio->orxPinMode
- *
- * \param device is a pointer to the device settings structure
- *
- * \retval MYKONOS_ERR_GPIO_OK Function completed successfully
- * \retval MYKONOS_ERR_SET_RADIOCTRL_PINS_ARMERROR ARM returned an error and did not accept the command.
- */
-mykonosGpioErr_t MYKONOS_setRadioControlPinMode(mykonosDevice_t *device)
-{
- uint8_t extData[4] = {0x81, 0, 0, 4}; //Object ID 0x81 (radio control structure), offset lsb, offset msb, length
- uint8_t armRadioControlStruct[4] = {0};
- uint32_t timeoutMs = 0;
- uint8_t cmdStatusByte = 0;
- mykonosGpioErr_t retval = MYKONOS_ERR_GPIO_OK;
-
-#if MYKONOS_VERBOSE == 1
- CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setRadioControlPinMode()\n");
-#endif
-
- /* write ARM radio control structure to enable pin mode/command mode */
- if (device->auxIo->armGpio->useRx2EnablePin > 0)
- {
- armRadioControlStruct[0] = 0x01;
- }
-
- if (device->auxIo->armGpio->useTx2EnablePin > 0)
- {
- armRadioControlStruct[1] = 0x01;
- }
-
- if (device->auxIo->armGpio->txRxPinMode > 0)
- {
- armRadioControlStruct[2] = 0x01;
- }
-
- if (device->auxIo->armGpio->orxPinMode > 0)
- {
- armRadioControlStruct[3] = 0x01;
- }
-
- retval = MYKONOS_writeArmMem(device, MYKONOS_ADDR_ARM_START_DATA_ADDR, &armRadioControlStruct[0], sizeof(armRadioControlStruct));
- if (retval != MYKONOS_ERR_GPIO_OK)
- {
- return retval;
- }
-
- retval = MYKONOS_sendArmCommand(device, MYKONOS_ARM_WRITECFG_OPCODE, &extData[0], sizeof(extData));
- if (retval != MYKONOS_ERR_GPIO_OK)
- {
- return retval;
- }
-
- timeoutMs = 1000;
- retval = MYKONOS_waitArmCmdStatus(device, MYKONOS_ARM_WRITECFG_OPCODE, timeoutMs, &cmdStatusByte);
- if (retval != MYKONOS_ERR_GPIO_OK)
- {
- return retval;
- }
-
- if (cmdStatusByte > 0)
- {
- CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SET_RADIOCTRL_PINS_ARMERROR,
- getGpioMykonosErrorMessage(MYKONOS_ERR_SET_RADIOCTRL_PINS_ARMERROR));
- return MYKONOS_ERR_SET_RADIOCTRL_PINS_ARMERROR;
- }
-
- return MYKONOS_ERR_GPIO_OK;
-}
-
-/**
* \brief Sets up the auxiliary ADC
*
* This function configures the AuxADC with the requested decimation. The AuxADC clock is set as close
@@ -2587,7 +2507,7 @@ mykonosGpioErr_t MYKONOS_setupAuxAdcs(mykonosDevice_t *device, uint8_t adcDecima
uint32_t hsDigClk_kHz = 0;
uint32_t auxAdcDiv = 0;
uint32_t auxAdcClk_kHz = 40000;
- uint32_t vcoDiv = device->clocks->clkPllVcoDiv;
+ uint32_t vcoDiv = (uint32_t)device->clocks->clkPllVcoDiv;
uint8_t vcoDivTimes10 = 10;
const uint8_t AUXADC_POWER_BIT_MASK = 0x80;
@@ -2596,7 +2516,7 @@ mykonosGpioErr_t MYKONOS_setupAuxAdcs(mykonosDevice_t *device, uint8_t adcDecima
CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setupAuxAdcs()\n");
#endif
- if(enable == 0)
+ if (enable == 0)
{
CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_AUX_ADC_BUFFER_CONFIG_0, 0xCF);
CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_AUX_ADC_CFG, 0x01);
@@ -2629,12 +2549,12 @@ mykonosGpioErr_t MYKONOS_setupAuxAdcs(mykonosDevice_t *device, uint8_t adcDecima
hsDigClk_kHz = (device->clocks->clkPllVcoFreq_kHz / vcoDivTimes10 / device->clocks->clkPllHsDiv) * 10;
auxAdcDiv = ((hsDigClk_kHz / 2) / (auxAdcClk_kHz)) - 1;
- if(auxAdcDiv > 63)
+ if (auxAdcDiv > 63)
{
auxAdcDiv = 63;
}
- if(adcDecimation > 0x07)
+ if (adcDecimation > 0x07)
{
CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_INV_AUX_ADC_DEC_PARM,
getGpioMykonosErrorMessage(MYKONOS_ERR_INV_AUX_ADC_DEC_PARM));
@@ -2679,7 +2599,7 @@ mykonosGpioErr_t MYKONOS_setAuxAdcChannel(mykonosDevice_t *device, mykonosAuxAdc
CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setAuxAdcChannel()\n");
#endif
- if ((auxAdcChannel & ~CHANNEL_MASK) > 0)
+ if (((uint8_t)auxAdcChannel & ~CHANNEL_MASK) > 0)
{
CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_INV_AUX_ADC_CHAN_PARM,
getGpioMykonosErrorMessage(MYKONOS_ERR_INV_AUX_ADC_CHAN_PARM));
@@ -2688,10 +2608,10 @@ mykonosGpioErr_t MYKONOS_setAuxAdcChannel(mykonosDevice_t *device, mykonosAuxAdc
/* Read current selected channel, if different power down AUXADC and change AUXADC */
CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_AUX_ADC_SEL, &currentAuxAdcChan);
- if (currentAuxAdcChan != auxAdcChannel)
+ if (currentAuxAdcChan != (uint8_t)auxAdcChannel)
{
CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_AUX_ADC_CFG, POWER_DOWN_AUXADC, 0x01, 0);
- CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_AUX_ADC_SEL, auxAdcChannel);
+ CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_AUX_ADC_SEL, ((auxAdcChannel & MYK_AUXADC_0_DIV2) ? 0: auxAdcChannel));
CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_AUX_ADC_CFG, POWER_UP_AUXADC, 0x01, 0);
}
@@ -2827,8 +2747,8 @@ mykonosGpioErr_t MYKONOS_setupAuxDacs(mykonosDevice_t *device)
CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_AUX_DAC_LATCH_CONTROL, 0x01);
/* Power up selected AuxDacs */
- CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_PDAUXDAC_MANUAL_IN_5_0, ((~device->auxIo->auxDacEnable) & 0x3F)); /* Power up enabled AuxDACs[5:0] */
- CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_PDAUXDAC_MANUAL_IN_9_6, (((~device->auxIo->auxDacEnable) >> 6) & 0x0F)); /* Power up enabled AuxDACs[9:6] */
+ CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_PDAUXDAC_MANUAL_IN_5_0, (~device->auxIo->auxDacEnable & 0x3F)); /* Power up enabled AuxDACs[5:0] */
+ CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_PDAUXDAC_MANUAL_IN_9_6, (((uint16_t)(~device->auxIo->auxDacEnable) >> 6) & 0x0F)); /* Power up enabled AuxDACs[9:6] */
return error;
}
@@ -2930,27 +2850,24 @@ mykonosGpioErr_t MYKONOS_setupGpio(mykonosDevice_t *device)
}
/* write GPIO pin direction registers */
- error = MYKONOS_setGpioOe(device, device->auxIo->gpio->gpioOe, oEnMask);
-
- /* Check and return if error */
- if (error)
+ if ((error = MYKONOS_setGpioOe(device, device->auxIo->gpio->gpioOe, oEnMask)) != MYKONOS_ERR_GPIO_OK)
{
return error;
}
/* write GPIO source control mode */
- if ((device->auxIo->gpio->gpioSrcCtrl3_0 > 15) || (device->auxIo->gpio->gpioSrcCtrl7_4 > 15) ||
- (device->auxIo->gpio->gpioSrcCtrl11_8 > 15) || (device->auxIo->gpio->gpioSrcCtrl15_12 > 15) ||
- (device->auxIo->gpio->gpioSrcCtrl18_16 > 15))
+ if (((uint8_t)device->auxIo->gpio->gpioSrcCtrl3_0 > 15) || ((uint8_t)device->auxIo->gpio->gpioSrcCtrl7_4 > 15) ||
+ ((uint8_t)device->auxIo->gpio->gpioSrcCtrl11_8 > 15) || ((uint8_t)device->auxIo->gpio->gpioSrcCtrl15_12 > 15) ||
+ ((uint8_t)device->auxIo->gpio->gpioSrcCtrl18_16 > 15))
{
CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SET_GPIO_1V8_INV_MODE,
getGpioMykonosErrorMessage(MYKONOS_ERR_SET_GPIO_1V8_INV_MODE));
return MYKONOS_ERR_SET_GPIO_1V8_INV_MODE;
}
- srcWrite = device->auxIo->gpio->gpioSrcCtrl3_0 + (device->auxIo->gpio->gpioSrcCtrl7_4 << 4) +
- (device->auxIo->gpio->gpioSrcCtrl11_8 << 8) + (device->auxIo->gpio->gpioSrcCtrl15_12 << 12) +
- (device->auxIo->gpio->gpioSrcCtrl18_16 << 16);
+ srcWrite = (uint32_t)device->auxIo->gpio->gpioSrcCtrl3_0 + ((uint32_t)device->auxIo->gpio->gpioSrcCtrl7_4 << 4) +
+ ((uint32_t)device->auxIo->gpio->gpioSrcCtrl11_8 << 8) + ((uint32_t)device->auxIo->gpio->gpioSrcCtrl15_12 << 12) +
+ ((uint32_t)device->auxIo->gpio->gpioSrcCtrl18_16 << 16);
error = MYKONOS_setGpioSourceCtrl(device, srcWrite);
@@ -2984,7 +2901,7 @@ mykonosGpioErr_t MYKONOS_setupGpio(mykonosDevice_t *device)
*/
mykonosGpioErr_t MYKONOS_setGpioOe(mykonosDevice_t *device, uint32_t gpioOutEn, uint32_t gpioUsedMask)
{
- uint32_t error = MYKONOS_ERR_GPIO_OK;
+ mykonosGpioErr_t error = MYKONOS_ERR_GPIO_OK;
const uint32_t GPIO_OE_MASK = 0x7FFFF;
@@ -3006,8 +2923,7 @@ mykonosGpioErr_t MYKONOS_setGpioOe(mykonosDevice_t *device, uint32_t gpioOutEn,
CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_GPIO_DIR_CTL_18_16, ((gpioOutEn >> 16) & 0xFF), ((gpioUsedMask >> 16) & 0xFF), 0);
/* Updating gpioConfig->gpioSetup->gpioOe output enable */
- error = MYKONOS_getGpioOe(device, &gpioOutEn);
- if (error)
+ if ((error = MYKONOS_getGpioOe(device, &gpioOutEn)) != MYKONOS_ERR_GPIO_OK)
{
return error;
}
@@ -3109,11 +3025,11 @@ mykonosGpioErr_t MYKONOS_setGpioSourceCtrl(mykonosDevice_t *device, uint32_t gpi
CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_SOURCE_CONTROL_EXTRA_BITS, ((gpioSrcCtrl >> 16) & 0x0F));
/* Updating gpioConfig->gpioSetup source control */
- device->auxIo->gpio->gpioSrcCtrl3_0 = gpioSrcCtrl & 0x0F;
- device->auxIo->gpio->gpioSrcCtrl7_4 = (gpioSrcCtrl >> 4) & 0x0F;
- device->auxIo->gpio->gpioSrcCtrl11_8 = (gpioSrcCtrl >> 8) & 0x0F;
- device->auxIo->gpio->gpioSrcCtrl15_12 = (gpioSrcCtrl >> 12) & 0x0F;
- device->auxIo->gpio->gpioSrcCtrl18_16 = (gpioSrcCtrl >> 16) & 0x0F;
+ device->auxIo->gpio->gpioSrcCtrl3_0 = (mykonosGpioMode_t)(gpioSrcCtrl & 0x0F);
+ device->auxIo->gpio->gpioSrcCtrl7_4 = (mykonosGpioMode_t)((gpioSrcCtrl >> 4) & 0x0F);
+ device->auxIo->gpio->gpioSrcCtrl11_8 = (mykonosGpioMode_t)((gpioSrcCtrl >> 8) & 0x0F);
+ device->auxIo->gpio->gpioSrcCtrl15_12 = (mykonosGpioMode_t)((gpioSrcCtrl >> 12) & 0x0F);
+ device->auxIo->gpio->gpioSrcCtrl18_16 = (mykonosGpioMode_t)((gpioSrcCtrl >> 16) & 0x0F);
/* Return */
return MYKONOS_ERR_GPIO_OK;
@@ -3140,6 +3056,13 @@ mykonosGpioErr_t MYKONOS_getGpioSourceCtrl(mykonosDevice_t *device, uint32_t *gp
CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getGpioSourceCtrl()\n");
#endif
+ if (gpioSrcCtrl == NULL)
+ {
+ CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GET_GPIO_SOURCE_CONTROL_NULL_PARM,
+ getGpioMykonosErrorMessage(MYKONOS_ERR_GET_GPIO_SOURCE_CONTROL_NULL_PARM));
+ return MYKONOS_ERR_GET_GPIO_SOURCE_CONTROL_NULL_PARM;
+ }
+
/* Reading GPIO output enable registers */
CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_SOURCE_CONTROL_LOWER_BYTE, &readBytes[0]);
CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_SOURCE_CONTROL_UPPER_BYTE, &readBytes[1]);
@@ -3188,12 +3111,12 @@ mykonosGpioErr_t MYKONOS_setupGpio3v3(mykonosDevice_t *device)
else
{
/* write GPIO pin direction registers */
- error = MYKONOS_setGpio3v3Oe(device, device->auxIo->gpio3v3->gpio3v3Oe);
+ if ((error = MYKONOS_setGpio3v3Oe(device, device->auxIo->gpio3v3->gpio3v3Oe)) != MYKONOS_ERR_GPIO_OK)
/* write GPIO3v3 mode */
- if ((device->auxIo->gpio3v3->gpio3v3SrcCtrl3_0 > 15) ||
- (device->auxIo->gpio3v3->gpio3v3SrcCtrl7_4 > 15) ||
- (device->auxIo->gpio3v3->gpio3v3SrcCtrl11_8 > 15))
+ if (((uint8_t)device->auxIo->gpio3v3->gpio3v3SrcCtrl3_0 > 15) ||
+ ((uint8_t)device->auxIo->gpio3v3->gpio3v3SrcCtrl7_4 > 15) ||
+ ((uint8_t)device->auxIo->gpio3v3->gpio3v3SrcCtrl11_8 > 15))
{
CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SET_GPIO_3V3_INV_MODE,
getGpioMykonosErrorMessage(MYKONOS_ERR_SET_GPIO_3V3_INV_MODE));
@@ -3425,9 +3348,9 @@ mykonosGpioErr_t MYKONOS_setGpio3v3SourceCtrl(mykonosDevice_t *device, uint16_t
CMB_SPIWriteByte(device->spiSettings, MYKONOS_ADDR_GPIO_3V3_MSB_SRC_CTL, ((gpio3v3SrcCtrl >> 8) & 0xFF));
/* Updating gpioConfig->gpioSetup source control */
- device->auxIo->gpio3v3->gpio3v3SrcCtrl3_0 = gpio3v3SrcCtrl & 0x0F;
- device->auxIo->gpio3v3->gpio3v3SrcCtrl7_4 = gpio3v3SrcCtrl & 0xF0;
- device->auxIo->gpio3v3->gpio3v3SrcCtrl11_8 = (gpio3v3SrcCtrl >> 8) & 0x0F;
+ device->auxIo->gpio3v3->gpio3v3SrcCtrl3_0 = (mykonosGpio3v3Mode_t)(gpio3v3SrcCtrl & 0x0F);
+ device->auxIo->gpio3v3->gpio3v3SrcCtrl7_4 = (mykonosGpio3v3Mode_t)(gpio3v3SrcCtrl & 0xF0);
+ device->auxIo->gpio3v3->gpio3v3SrcCtrl11_8 = (mykonosGpio3v3Mode_t)((gpio3v3SrcCtrl >> 8) & 0x0F);
/* Return */
return MYKONOS_ERR_GPIO_OK;
@@ -3582,6 +3505,7 @@ mykonosGpioErr_t MYKONOS_setRxGainCompensation (mykonosDevice_t *device, mykonos
*
* \retval MYKONOS_ERR_GPIO_OK Function completed successfully
* \retval MYKONOS_ERR_GAINCOMP_NULL_STRUCT gain compensation structure gainComp is not initialised
+ * \retval MYKONOS_ERR_GAINCOMP_EN_NULL_PARM enable is null pointer for the passed parameter
*/
mykonosGpioErr_t MYKONOS_getRxGainCompensation (mykonosDevice_t *device, mykonosGainComp_t *gainComp, uint8_t *enabled)
{
@@ -3608,6 +3532,13 @@ mykonosGpioErr_t MYKONOS_getRxGainCompensation (mykonosDevice_t *device, mykonos
return MYKONOS_ERR_GAINCOMP_NULL_STRUCT;
}
+ if (enabled == NULL)
+ {
+ CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GAINCOMP_EN_NULL_PARM,
+ getGpioMykonosErrorMessage(MYKONOS_ERR_GAINCOMP_EN_NULL_PARM));
+ return MYKONOS_ERR_GAINCOMP_EN_NULL_PARM;
+ }
+
/* Read gain compensation setup from device */
CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_RX1_GAIN_COMP_OFFSET, &regWr2);
CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_RX2_GAIN_COMP_OFFSET, &regWr3);
@@ -3724,6 +3655,7 @@ mykonosGpioErr_t MYKONOS_setObsRxGainCompensation (mykonosDevice_t *device, myko
*
* \retval MYKONOS_ERR_GPIO_OK Function completed successfully
* \retval MYKONOS_ERR_OBS_RX_GAINCOMP_NULL_STRUCT observation channel gain compensation structure gainComp is not initialised
+ * \retval MYKONOS_ERR_OBS_RX_GAINCOMP_EN_NULL_PARAM enabled is null pointer for the parameter passed
*/
mykonosGpioErr_t MYKONOS_getObsRxGainCompensation (mykonosDevice_t *device, mykonosObsRxGainComp_t *gainComp, uint8_t *enabled)
{
@@ -3749,6 +3681,13 @@ mykonosGpioErr_t MYKONOS_getObsRxGainCompensation (mykonosDevice_t *device, myko
return MYKONOS_ERR_OBS_RX_GAINCOMP_NULL_STRUCT;
}
+ if (enabled == NULL)
+ {
+ CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_OBS_RX_GAINCOMP_EN_NULL_PARAM,
+ getGpioMykonosErrorMessage(MYKONOS_ERR_OBS_RX_GAINCOMP_EN_NULL_PARAM));
+ return MYKONOS_ERR_OBS_RX_GAINCOMP_EN_NULL_PARAM;
+ }
+
/* Read gain compensation setup from device */
CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_DPD_SNF_RX_GAIN_COMP_OFFSET, &regRd2);
CMB_SPIReadByte(device->spiSettings, MYKONOS_ADDR_DPD_SNF_RX_GAIN_COMP_CFG, &regRd3);
@@ -3845,10 +3784,10 @@ mykonosGpioErr_t MYKONOS_setRxSlicerCtrl(mykonosDevice_t *device, uint8_t slicer
/* Check for Rx2 Slicer input control */
switch (rx2Pins)
{
- case GPIO_5_6_7:
+ case GPIO_11_12_13:
regWr |= 0x00;
break;
- case GPIO_11_12_13:
+ case GPIO_5_6_7:
regWr |= 0x04;
break;
default:
@@ -3866,7 +3805,7 @@ mykonosGpioErr_t MYKONOS_setRxSlicerCtrl(mykonosDevice_t *device, uint8_t slicer
}
else
{
- regWr |= (slicerStep << STEP_SHIFT);
+ regWr |= (uint8_t)(slicerStep << STEP_SHIFT);
}
}
@@ -3961,17 +3900,18 @@ mykonosGpioErr_t MYKONOS_getRxSlicerCtrl(mykonosDevice_t *device, uint8_t *slice
switch ((regRd & RX2_MASK) >> RX2_SHIFT)
{
case 0:
- *rx2Pins = GPIO_5_6_7;
+ *rx2Pins = GPIO_11_12_13;
break;
case 1:
- *rx2Pins = GPIO_11_12_13;
+ *rx2Pins = GPIO_5_6_7;
break;
default:
- *rx2Pins = GPIO_5_6_7;
+ *rx2Pins = GPIO_11_12_13;
+ break;
}
- *rx1Pins = (regRd & RX1_MASK) >> RX1_SHIFT;
+ *rx1Pins = (mykonosRxSlicer_t)((regRd & RX1_MASK) >> RX1_SHIFT);
/* Return */
return MYKONOS_ERR_GPIO_OK;
@@ -4058,7 +3998,7 @@ mykonosGpioErr_t MYKONOS_setObsRxSlicerCtrl(mykonosDevice_t *device, uint8_t sli
}
else
{
- regWr |= (slicerStep << STEP_SHIFT);
+ regWr |= (uint8_t)((slicerStep << STEP_SHIFT));
}
}
@@ -4143,7 +4083,7 @@ mykonosGpioErr_t MYKONOS_getObsRxSlicerCtrl(mykonosDevice_t *device, uint8_t *sl
break;
default:
- *obsRxPins = 0;
+ *obsRxPins = (mykonosObsRxSlicer_t)0;
break;
}
@@ -4156,7 +4096,7 @@ mykonosGpioErr_t MYKONOS_getObsRxSlicerCtrl(mykonosDevice_t *device, uint8_t *sl
* \brief Floating point formatter enable and setup function.
*
* The floating point formatter block is a function that works in conjunction with the gain
- * compensating block, as the gain compensation requires increased dynamic range (total gain range on AD9370 is 42dB)
+ * compensating block, as the gain compensation requires increased dynamic range (total gain range on AD9371 is 42dB)
* which increases the bitwidth in the digital datapath.
*
* <B>Dependencies</B>
@@ -4197,7 +4137,7 @@ mykonosGpioErr_t MYKONOS_setFloatPointFrmt (mykonosDevice_t *device, mykonosFloa
#endif
/* Check for gainComp initialised */
- if (&floatFrmt->dataFormat == 0)
+ if (floatFrmt == NULL)
{
CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_FLOATFRMT_SET_NULL_STRUCT,
getGpioMykonosErrorMessage(MYKONOS_ERR_FLOATFRMT_SET_NULL_STRUCT));
@@ -4244,9 +4184,9 @@ mykonosGpioErr_t MYKONOS_setFloatPointFrmt (mykonosDevice_t *device, mykonosFloa
return MYKONOS_ERR_FLOATFRMT_INV_LEADING;
}
- regWr1 = (floatFrmt->roundMode << ROUND_SHIFT) | (floatFrmt->dataFormat << DATA_FRMT_SHIFT) |
+ regWr1 = (uint8_t)((floatFrmt->roundMode << ROUND_SHIFT) | (floatFrmt->dataFormat << DATA_FRMT_SHIFT) |
(floatFrmt->encNan << ENCODE_SHIFT) | (floatFrmt->expBits << EXPBITS_SHIFT) |
- (floatFrmt->leading << LEADING_SHIFT);
+ (floatFrmt->leading << LEADING_SHIFT));
/* Write gain compensation setup to device */
@@ -4380,7 +4320,7 @@ mykonosGpioErr_t MYKONOS_setRxEnFloatPntFrmt (mykonosDevice_t *device, uint8_t r
/* Enabling floating point formatter for Rx1 and Rx2 */
regWr = 0x11;
- regWr |= (rx1Att << RX1ATT_SHIFT) | (rx2Att << RX2ATT_SHIFT);
+ regWr |= (uint8_t)((rx1Att << RX1ATT_SHIFT) | (rx2Att << RX2ATT_SHIFT));
}
/* Writing floating point formatter enables for Rx1 and Rx2 */
@@ -4394,7 +4334,7 @@ mykonosGpioErr_t MYKONOS_setRxEnFloatPntFrmt (mykonosDevice_t *device, uint8_t r
* \brief Floating point formatter setup function.
*
* The floating point formatter block is a function that works in conjunction with the gain
- * compensating block, as the gain compensation requires increased dynamic range (total gain range on AD9370 is 42dB)
+ * compensating block, as the gain compensation requires increased dynamic range (total gain range on AD9371 is 42dB)
* which increases the bitwidth in the digital datapath.
*
* <B>Dependencies</B>
@@ -4516,7 +4456,7 @@ mykonosGpioErr_t MYKONOS_setOrxEnFloatPntFrmt (mykonosDevice_t *device, uint8_t
/* Enabling floating point formatter for Rx1 and Rx2 */
regWr = 0x01;
- regWr |= orxAtt << ORXATT_SHIFT;
+ regWr |= (uint8_t)(orxAtt << ORXATT_SHIFT);
}
/* Writing floating point formatter enable for ORX channel */
@@ -4531,7 +4471,7 @@ mykonosGpioErr_t MYKONOS_setOrxEnFloatPntFrmt (mykonosDevice_t *device, uint8_t
* \brief Floating point formatter enable and setup function.
*
* The floating point formatter block is a function that works in conjunction with the gain
- * compensating block, as the gain compensation requires increased dynamic range (total gain range on AD9370 is 42dB)
+ * compensating block, as the gain compensation requires increased dynamic range (total gain range on AD9371 is 42dB)
* which increases the bitwidth in the digital datapath.
*
* <B>Dependencies</B>
@@ -4613,7 +4553,7 @@ mykonosGpioErr_t MYKONOS_setupTempSensor(mykonosDevice_t *device, mykonosTempSen
uint8_t offsetFromDevice = 0;
const uint8_t OFFSET_API = 0x43;
- const uint8_t TEMP_OFFSET_MASK = 0xFF;
+/* const uint8_t TEMP_OFFSET_MASK = 0xFF;*/
const uint8_t TEMP_WINDOW_MASK = 0xF0;
const uint8_t TEMP_WINDOW_CHECK = 0x0F;
const uint8_t TEMP_DEC_MASK = 0x07;
@@ -4643,12 +4583,12 @@ mykonosGpioErr_t MYKONOS_setupTempSensor(mykonosDevice_t *device, mykonosTempSen
if (tempSensor->overrideFusedOffset > 0)
{
/* Check Temperature sensor offset range */
- if (tempSensor->offset & ~TEMP_OFFSET_MASK)
+/* if (tempSensor->offset & ~TEMP_OFFSET_MASK)
{
CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SETUPTEMPSENSOR_INV_OFFSET,
getGpioMykonosErrorMessage(MYKONOS_ERR_SETUPTEMPSENSOR_INV_OFFSET));
return MYKONOS_ERR_SETUPTEMPSENSOR_INV_OFFSET;
- }
+ }*/
CMB_SPIWriteField (device->spiSettings, MYKONOS_ADDR_TEMP_SENSOR_CONFIG, 1, OFFSET_OVERRIDE_MASK, 4);
CMB_SPIWriteByte (device->spiSettings, MYKONOS_ADDR_TEMP_SENSOR_OFFSET, tempSensor->offset);
@@ -4886,9 +4826,9 @@ mykonosGpioErr_t MYKONOS_readTempSensor(mykonosDevice_t *device, mykonosTempSens
* \retval MYKONOS_ERR_GPIO_DRV_INV_PARAM GPIO out of range- valid GPIOs are in the range 0x00000 to 0x7FFFF.
* \retval MYKONOS_ERR_GPIO_OK Function completed successfully
*/
-mykonosGpioErr_t MYKONOS_setGpioDrv(mykonosDevice_t *device, mykonosGpioSelect_t gpioDrv)
+mykonosGpioErr_t MYKONOS_setGpioDrv(mykonosDevice_t *device, uint32_t gpioDrv)
{
- uint32_t error = MYKONOS_ERR_GPIO_OK;
+ mykonosGpioErr_t error = MYKONOS_ERR_GPIO_OK;
uint8_t reg0 = 0x00;
uint8_t reg1 = 0x00;
@@ -4915,33 +4855,37 @@ mykonosGpioErr_t MYKONOS_setGpioDrv(mykonosDevice_t *device, mykonosGpioSelect_t
{
reg0 = (uint8_t)(gpioDrv & 0xFF);
}
+ else
+ {
+ reg0 = 0x00;
+ }
- if (gpioDrv & MYKGPIO18)
+ if (gpioDrv & (uint32_t)MYKGPIO18)
{
reg1 |= 0x01;
}
- if ((gpioDrv & MYKGPIO17) || (gpioDrv & MYKGPIO16))
+ if ((gpioDrv & (uint32_t)MYKGPIO17) || (gpioDrv & (uint32_t)MYKGPIO16))
{
reg1 |= 0x02;
}
- if ((gpioDrv & MYKGPIO15) || (gpioDrv & MYKGPIO8))
+ if ((gpioDrv & (uint32_t)MYKGPIO15) || (gpioDrv & (uint32_t)MYKGPIO8))
{
reg1 |= 0x04;
}
- if ((gpioDrv & MYKGPIO14) || (gpioDrv & MYKGPIO13))
+ if ((gpioDrv & (uint32_t)MYKGPIO14) || (gpioDrv & (uint32_t)MYKGPIO13))
{
reg1 |= 0x08;
}
- if ((gpioDrv & MYKGPIO10) || (gpioDrv & MYKGPIO9))
+ if ((gpioDrv & (uint32_t)MYKGPIO10) || (gpioDrv & (uint32_t)MYKGPIO9))
{
reg1 |= 0x10;
}
- if ((gpioDrv & MYKGPIO12) || (gpioDrv & MYKGPIO11))
+ if ((gpioDrv & (uint32_t)MYKGPIO12) || (gpioDrv & (uint32_t)MYKGPIO11))
{
reg1 |= 0x20;
}
@@ -4967,9 +4911,9 @@ mykonosGpioErr_t MYKONOS_setGpioDrv(mykonosDevice_t *device, mykonosGpioSelect_t
* \retval MYKONOS_ERR_GETGPIODRV_NULL_PARAM null parameter passed to the function.
* \retval MYKONOS_ERR_GPIO_OK Function completed successfully
*/
-mykonosGpioErr_t MYKONOS_getGpioDrv(mykonosDevice_t *device, mykonosGpioSelect_t *gpioDrv)
+mykonosGpioErr_t MYKONOS_getGpioDrv(mykonosDevice_t *device, uint32_t *gpioDrv)
{
- uint32_t error = MYKONOS_ERR_GPIO_OK;
+ mykonosGpioErr_t error = MYKONOS_ERR_GPIO_OK;
uint8_t reg0 = 0x00;
uint8_t reg1 = 0x00;
uint32_t gpioDrvRd = 0x00;
@@ -4993,35 +4937,35 @@ mykonosGpioErr_t MYKONOS_getGpioDrv(mykonosDevice_t *device, mykonosGpioSelect_t
if (reg1 & 0x01)
{
- gpioDrvRd |= MYKGPIO18;
+ gpioDrvRd |= (uint32_t)MYKGPIO18;
}
if (reg1 & 0x02)
{
- gpioDrvRd |= MYKGPIO17 | MYKGPIO16;
+ gpioDrvRd |= (uint32_t)MYKGPIO17 | (uint32_t)MYKGPIO16;
}
if (reg1 & 0x04)
{
- gpioDrvRd |= MYKGPIO8 | MYKGPIO15;
+ gpioDrvRd |= (uint32_t)MYKGPIO8 | (uint32_t)MYKGPIO15;
}
if (reg1 & 0x08)
{
- gpioDrvRd |= MYKGPIO14 | MYKGPIO13;
+ gpioDrvRd |= (uint32_t)MYKGPIO14 | (uint32_t)MYKGPIO13;
}
if (reg1 & 0x10)
{
- gpioDrvRd |= MYKGPIO10 | MYKGPIO9;
+ gpioDrvRd |= (uint32_t)MYKGPIO10 | (uint32_t)MYKGPIO9;
}
if (reg1 & 0x20)
{
- gpioDrvRd |= MYKGPIO12 | MYKGPIO11;
+ gpioDrvRd |= (uint32_t)MYKGPIO12 | (uint32_t)MYKGPIO11;
}
- *gpioDrv = gpioDrvRd;
+ *gpioDrv = (mykonosGpioSelect_t)gpioDrvRd;
return error;
}
@@ -5057,7 +5001,7 @@ mykonosGpioErr_t MYKONOS_getGpioDrv(mykonosDevice_t *device, mykonosGpioSelect_t
*/
mykonosGpioErr_t MYKONOS_setGpioSlewRate(mykonosDevice_t *device, mykonosGpioSelect_t gpioSelect, mykonosGpioSlewRate_t slewRate)
{
- uint32_t error = MYKONOS_ERR_GPIO_OK;
+ mykonosGpioErr_t error = MYKONOS_ERR_GPIO_OK;
uint8_t reg0 = 0x00;
uint8_t reg1 = 0x00;
uint8_t reg2 = 0x00;
@@ -5074,7 +5018,7 @@ mykonosGpioErr_t MYKONOS_setGpioSlewRate(mykonosDevice_t *device, mykonosGpioSel
#endif
/* Error checking for correct number of GPIOs. */
- if ((gpioSelect > GPIO_MASK) || (slewRate > SLEWRATE_MASK))
+ if (((uint32_t)gpioSelect > GPIO_MASK) || ((uint8_t)slewRate > SLEWRATE_MASK))
{
CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_SLEW_RATE_INV_PARAM,
getGpioMykonosErrorMessage(MYKONOS_ERR_GPIO_SLEW_RATE_INV_PARAM));
@@ -5086,61 +5030,61 @@ mykonosGpioErr_t MYKONOS_setGpioSlewRate(mykonosDevice_t *device, mykonosGpioSel
CMB_SPIReadByte(device->spiSettings, MYKONOS_GPIO_SLEW_CTL_2, &reg2);
CMB_SPIReadByte(device->spiSettings, MYKONOS_GPIO_SLEW_CTL_3, &reg3);
- if (gpioSelect & MYKGPIO18)
+ if ((uint32_t)gpioSelect & (uint32_t)MYKGPIO18)
{
- reg0 = (reg0 & ~(SLEWRATE_MASK << SHIFT4NIBLE)) | (slewRate << SHIFT4NIBLE);
+ reg0 = (reg0 & ~(SLEWRATE_MASK << SHIFT4NIBLE)) | ((uint8_t)slewRate << SHIFT4NIBLE);
}
- if ((gpioSelect & MYKGPIO17) || (gpioSelect & MYKGPIO16))
+ if (((uint32_t)gpioSelect & (uint32_t)MYKGPIO17) || ((uint32_t)gpioSelect & (uint32_t)MYKGPIO16))
{
- reg0 = (reg0 & ~(SLEWRATE_MASK << SHIFT3NIBLE)) | (slewRate << SHIFT3NIBLE);
+ reg0 = (reg0 & ~(SLEWRATE_MASK << SHIFT3NIBLE)) | ((uint8_t)slewRate << SHIFT3NIBLE);
}
- if ((gpioSelect & MYKGPIO15) || (gpioSelect & MYKGPIO8))
+ if (((uint32_t)gpioSelect & (uint32_t)MYKGPIO15) || ((uint32_t)gpioSelect & (uint32_t)MYKGPIO8))
{
- reg0 = (reg0 & ~(SLEWRATE_MASK << SHIFT2NIBLE)) | (slewRate << SHIFT2NIBLE);
+ reg0 = (reg0 & ~(SLEWRATE_MASK << SHIFT2NIBLE)) | ((uint8_t)slewRate << SHIFT2NIBLE);
}
- if ((gpioSelect & MYKGPIO14) || (gpioSelect & MYKGPIO13))
+ if (((uint32_t)gpioSelect & (uint32_t)MYKGPIO14) || ((uint32_t)gpioSelect & (uint32_t)MYKGPIO13))
{
- reg0 = (reg0 & ~(SLEWRATE_MASK)) | slewRate;
+ reg0 = (reg0 & ~(SLEWRATE_MASK)) | (uint8_t)slewRate;
}
- if ((gpioSelect & MYKGPIO11) || (gpioSelect & MYKGPIO12))
+ if (((uint32_t)gpioSelect & (uint32_t)MYKGPIO11) || ((uint32_t)gpioSelect & (uint32_t)MYKGPIO12))
{
- reg1 = (reg1 & ~(SLEWRATE_MASK << SHIFT4NIBLE)) | (slewRate << SHIFT4NIBLE);
+ reg1 = (reg1 & ~(SLEWRATE_MASK << SHIFT4NIBLE)) | ((uint8_t)slewRate << SHIFT4NIBLE);
}
- if ((gpioSelect & MYKGPIO9) || (gpioSelect & MYKGPIO10))
+ if (((uint32_t)gpioSelect & (uint32_t)MYKGPIO9) || ((uint32_t)gpioSelect & (uint32_t)MYKGPIO10))
{
- reg1 = (reg1 & ~(SLEWRATE_MASK << SHIFT3NIBLE)) | (slewRate << SHIFT3NIBLE);
+ reg1 = (reg1 & ~(SLEWRATE_MASK << SHIFT3NIBLE)) | ((uint8_t)slewRate << SHIFT3NIBLE);
}
- if (gpioSelect & MYKGPIO7)
+ if ((uint32_t)gpioSelect & (uint32_t)MYKGPIO7)
{
- reg1 = (reg1 & ~(SLEWRATE_MASK << SHIFT2NIBLE)) | (slewRate << SHIFT2NIBLE);
+ reg1 = (reg1 & ~(SLEWRATE_MASK << SHIFT2NIBLE)) | ((uint8_t)slewRate << SHIFT2NIBLE);
}
- if (gpioSelect & MYKGPIO6)
+ if ((uint32_t)gpioSelect & (uint32_t)MYKGPIO6)
{
- reg1 = (reg1 & ~(SLEWRATE_MASK)) | slewRate;
+ reg1 = (reg1 & ~(SLEWRATE_MASK)) | (uint8_t)slewRate;
}
- if (gpioSelect & MYKGPIO5)
+ if ((uint32_t)gpioSelect & (uint32_t)MYKGPIO5)
{
- reg2 = (reg2 & ~(SLEWRATE_MASK << SHIFT4NIBLE)) | (slewRate << SHIFT4NIBLE);
+ reg2 = (reg2 & ~(SLEWRATE_MASK << SHIFT4NIBLE)) | ((uint8_t)slewRate << SHIFT4NIBLE);
}
- if (gpioSelect & MYKGPIO4)
+ if ((uint32_t)gpioSelect & (uint32_t)MYKGPIO4)
{
- reg2 = (reg2 & ~(SLEWRATE_MASK << SHIFT3NIBLE)) | (slewRate << SHIFT3NIBLE);
+ reg2 = (reg2 & ~(SLEWRATE_MASK << SHIFT3NIBLE)) | ((uint8_t)slewRate << SHIFT3NIBLE);
}
- if (gpioSelect & MYKGPIO3)
+ if ((uint32_t)gpioSelect & (uint32_t)MYKGPIO3)
{
- reg2 = (reg2 & ~(SLEWRATE_MASK << SHIFT2NIBLE)) | (slewRate << SHIFT2NIBLE);
+ reg2 = (reg2 & ~(SLEWRATE_MASK << SHIFT2NIBLE)) | ((uint8_t)slewRate << SHIFT2NIBLE);
}
- if (gpioSelect & MYKGPIO2)
+ if ((uint32_t)gpioSelect & (uint32_t)MYKGPIO2)
{
- reg2 = (reg2 & ~(SLEWRATE_MASK)) | slewRate;
+ reg2 = (reg2 & ~(SLEWRATE_MASK)) | (uint8_t)slewRate;
}
- if (gpioSelect & MYKGPIO1)
+ if ((uint32_t)gpioSelect & (uint32_t)MYKGPIO1)
{
- reg3 = (reg3 & ~(SLEWRATE_MASK << SHIFT2NIBLE)) | (slewRate << SHIFT2NIBLE);
+ reg3 = (reg3 & ~(SLEWRATE_MASK << SHIFT2NIBLE)) | ((uint8_t)slewRate << SHIFT2NIBLE);
}
- if (gpioSelect & MYKGPIO0)
+ if ((uint32_t)gpioSelect & (uint32_t)MYKGPIO0)
{
- reg3 = (reg3 & ~(SLEWRATE_MASK)) | slewRate;
+ reg3 = (reg3 & ~(SLEWRATE_MASK)) | (uint8_t)slewRate;
}
/* Prepare registers */
@@ -5183,7 +5127,7 @@ mykonosGpioErr_t MYKONOS_getGpioSlewRate(mykonosDevice_t *device, mykonosGpioSel
const uint32_t SHIFT2NIBLE = 0x02;
#if MYKONOS_VERBOSE == 1
- CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setGpioSlewRate()\n");
+ CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getGpioSlewRate()\n");
#endif
/* Error checking for NULL parameter. */
@@ -5202,51 +5146,51 @@ mykonosGpioErr_t MYKONOS_getGpioSlewRate(mykonosDevice_t *device, mykonosGpioSel
switch (gpioSelect)
{
case MYKGPIO18:
- slewSetting = (reg0 & (SLEWRATE_MASK << SHIFT4NIBLE)) >> SHIFT4NIBLE;
+ slewSetting = (mykonosGpioSlewRate_t)((reg0 & (SLEWRATE_MASK << SHIFT4NIBLE)) >> SHIFT4NIBLE);
break;
case MYKGPIO17:
case MYKGPIO16:
- slewSetting = (reg0 & (SLEWRATE_MASK << SHIFT3NIBLE)) >> SHIFT3NIBLE;
+ slewSetting = (mykonosGpioSlewRate_t)((reg0 & (SLEWRATE_MASK << SHIFT3NIBLE)) >> SHIFT3NIBLE);
break;
case MYKGPIO15:
case MYKGPIO8:
- slewSetting = (reg0 & (SLEWRATE_MASK << SHIFT2NIBLE)) >> SHIFT2NIBLE;
+ slewSetting = (mykonosGpioSlewRate_t)((reg0 & (SLEWRATE_MASK << SHIFT2NIBLE)) >> SHIFT2NIBLE);
break;
case MYKGPIO14:
case MYKGPIO13:
- slewSetting = (reg0 & (SLEWRATE_MASK));
+ slewSetting = (mykonosGpioSlewRate_t)(reg0 & (SLEWRATE_MASK));
break;
case MYKGPIO11:
case MYKGPIO12:
- slewSetting = (reg1 & (SLEWRATE_MASK << SHIFT4NIBLE)) >> SHIFT4NIBLE;
+ slewSetting = (mykonosGpioSlewRate_t)((reg1 & (SLEWRATE_MASK << SHIFT4NIBLE)) >> SHIFT4NIBLE);
break;
case MYKGPIO9:
case MYKGPIO10:
- slewSetting = (reg1 & (SLEWRATE_MASK << SHIFT3NIBLE)) >> SHIFT3NIBLE;
+ slewSetting = (mykonosGpioSlewRate_t)((reg1 & (SLEWRATE_MASK << SHIFT3NIBLE)) >> SHIFT3NIBLE);
break;
case MYKGPIO7:
- slewSetting = (reg1 & (SLEWRATE_MASK << SHIFT2NIBLE)) >> SHIFT2NIBLE;
+ slewSetting = (mykonosGpioSlewRate_t)((reg1 & (SLEWRATE_MASK << SHIFT2NIBLE)) >> SHIFT2NIBLE);
break;
case MYKGPIO6:
- slewSetting = (reg1 & (SLEWRATE_MASK));
+ slewSetting = (mykonosGpioSlewRate_t)(reg1 & (SLEWRATE_MASK));
break;
case MYKGPIO5:
- slewSetting = (reg2 & (SLEWRATE_MASK << SHIFT4NIBLE)) >> SHIFT4NIBLE;
+ slewSetting = (mykonosGpioSlewRate_t)((reg2 & (SLEWRATE_MASK << SHIFT4NIBLE)) >> SHIFT4NIBLE);
break;
case MYKGPIO4:
- slewSetting = (reg2 & (SLEWRATE_MASK << SHIFT3NIBLE)) >> SHIFT3NIBLE;
+ slewSetting = (mykonosGpioSlewRate_t)((reg2 & (SLEWRATE_MASK << SHIFT3NIBLE)) >> SHIFT3NIBLE);
break;
case MYKGPIO3:
- slewSetting = (reg2 & (SLEWRATE_MASK << SHIFT2NIBLE)) >> SHIFT2NIBLE;
+ slewSetting = (mykonosGpioSlewRate_t)((reg2 & (SLEWRATE_MASK << SHIFT2NIBLE)) >> SHIFT2NIBLE);
break;
case MYKGPIO2:
- slewSetting = (reg2 & (SLEWRATE_MASK));
+ slewSetting = (mykonosGpioSlewRate_t)(reg2 & (SLEWRATE_MASK));
break;
case MYKGPIO1:
- slewSetting = (reg3 & (SLEWRATE_MASK << SHIFT2NIBLE)) >> SHIFT2NIBLE;
+ slewSetting = (mykonosGpioSlewRate_t)((reg3 & (SLEWRATE_MASK << SHIFT2NIBLE)) >> SHIFT2NIBLE);
break;
case MYKGPIO0:
- slewSetting = (reg3 & (SLEWRATE_MASK));
+ slewSetting = (mykonosGpioSlewRate_t)(reg3 & (SLEWRATE_MASK));
break;
default:
CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_SLEW_RATE_INV_PARAM,
@@ -5281,7 +5225,7 @@ mykonosGpioErr_t MYKONOS_setCmosDrv(mykonosDevice_t *device, mykonosCmosPadDrvSt
const uint8_t CMOS_DRV_SHIFT = 0x04;
#if MYKONOS_VERBOSE == 1
- CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setSpiDrv()\n");
+ CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setCmosDrv()\n");
#endif
/* Error checking for correct drive */
@@ -5297,7 +5241,6 @@ mykonosGpioErr_t MYKONOS_setCmosDrv(mykonosDevice_t *device, mykonosCmosPadDrvSt
CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_CMOS_DRV_INV_PARAM,
getGpioMykonosErrorMessage(MYKONOS_ERR_CMOS_DRV_INV_PARAM));
return MYKONOS_ERR_CMOS_DRV_INV_PARAM;
- break;
}
CMB_SPIWriteField(device->spiSettings, MYKONOS_GPIO_SLEW_CTL_3, cmosDrv, (~CMOS_DRV_MASK), CMOS_DRV_SHIFT);
@@ -5326,7 +5269,7 @@ mykonosGpioErr_t MYKONOS_getCmosDrv(mykonosDevice_t *device, mykonosCmosPadDrvSt
const uint8_t CMOS_DRV_SHIFT = 0x04;
#if MYKONOS_VERBOSE == 1
- CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_setGpioSlewRate()\n");
+ CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_getCmosDrv()\n");
#endif
if (cmosDrv == NULL)
@@ -5338,7 +5281,7 @@ mykonosGpioErr_t MYKONOS_getCmosDrv(mykonosDevice_t *device, mykonosCmosPadDrvSt
CMB_SPIReadByte(device->spiSettings, MYKONOS_GPIO_SLEW_CTL_3, &regRd);
- *cmosDrv = ((regRd & CMOS_DRV_MASK) >> CMOS_DRV_SHIFT);
+ *cmosDrv = (mykonosCmosPadDrvStr_t)((regRd & CMOS_DRV_MASK) >> CMOS_DRV_SHIFT);
return MYKONOS_ERR_GPIO_OK;
}
@@ -5387,34 +5330,28 @@ mykonosGpioErr_t MYKONOS_spi2GpioSetup(mykonosDevice_t *device, uint8_t enable,
{
uint8_t regWrite = 0;
uint8_t enableBit = 0;
- mykonosErr_t error = MYKONOS_ERR_OK;
- uint32_t halError = COMMONERR_OK;
const uint32_t SPI2_PIN_MASK = 0x03;
#ifdef MYKONOS_VERBOSE
- CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_OK, "MYKONOS_txGpioAttControl()\n");
+ CMB_writeToLog(ADIHAL_LOG_MESSAGE, device->spiSettings->chipSelectIndex, MYKONOS_ERR_GPIO_OK, "MYKONOS_spi2GpioSetup()\n");
#endif
/* Error checking for correctness of GPIO to control attenuation word. */
if (updateTxAttenPinSelect & ~SPI2_PIN_MASK)
{
CMB_writeToLog(ADIHAL_LOG_ERROR, device->spiSettings->chipSelectIndex, MYKONOS_ERR_SPI2_INV_GPIO,
- getMykonosErrorMessage(MYKONOS_ERR_SPI2_INV_GPIO));
+ getGpioMykonosErrorMessage(MYKONOS_ERR_SPI2_INV_GPIO));
return MYKONOS_ERR_SPI2_INV_GPIO;
}
/* masking the enable bit and the required pin */
enableBit = (enable > 0) ? 1 : 0;
- regWrite = (updateTxAttenPinSelect << 4) | (enableBit << 3);
+ regWrite = (uint8_t)((updateTxAttenPinSelect << 4) | (enableBit << 3));
/* Set the SPI2 enable and the GPIO pin associated. */
- halError = CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_CONFIGURATION_CONTROL_1, regWrite, 0x38, 0);
- if (halError)
- {
- return MYKONOS_ERR_HAL_LAYER;
- }
+ CMB_SPIWriteField(device->spiSettings, MYKONOS_ADDR_CONFIGURATION_CONTROL_1, regWrite, 0x38, 0);
- return error;
+ return MYKONOS_ERR_GPIO_OK;
}