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authorBrent Stapleton <brent.stapleton@ettus.com>2019-08-01 18:55:38 -0700
committerMartin Braun <martin.braun@ettus.com>2019-11-26 11:49:25 -0800
commitd420f4968f7bd78afa4f27aaf5abcf26d0f61f4c (patch)
tree5ec79590724b220c8d99d8e60d49cd503e5a551b /host
parent5072a0f7b6bfacb18d7a7918a843c1da11447612 (diff)
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tx_fe_200: make register offset controllable
Following the changes in RX frontend controls, TX frontend register offsets are now arguments to the factory function. They default to 4, which is what the register offset was in the file before these changes.
Diffstat (limited to 'host')
-rw-r--r--host/lib/include/uhdlib/usrp/cores/tx_frontend_core_200.hpp2
-rw-r--r--host/lib/usrp/cores/tx_frontend_core_200.cpp19
2 files changed, 11 insertions, 10 deletions
diff --git a/host/lib/include/uhdlib/usrp/cores/tx_frontend_core_200.hpp b/host/lib/include/uhdlib/usrp/cores/tx_frontend_core_200.hpp
index 0221007d1..ae071c715 100644
--- a/host/lib/include/uhdlib/usrp/cores/tx_frontend_core_200.hpp
+++ b/host/lib/include/uhdlib/usrp/cores/tx_frontend_core_200.hpp
@@ -25,7 +25,7 @@ public:
virtual ~tx_frontend_core_200(void) = 0;
- static sptr make(uhd::wb_iface::sptr iface, const size_t base);
+ static sptr make(uhd::wb_iface::sptr iface, const size_t base, const size_t offset=4);
virtual void set_mux(const std::string &mode) = 0;
diff --git a/host/lib/usrp/cores/tx_frontend_core_200.cpp b/host/lib/usrp/cores/tx_frontend_core_200.cpp
index d44a618bc..af40d4379 100644
--- a/host/lib/usrp/cores/tx_frontend_core_200.cpp
+++ b/host/lib/usrp/cores/tx_frontend_core_200.cpp
@@ -15,11 +15,11 @@
using namespace uhd;
-#define REG_TX_FE_DC_OFFSET_I _base + 0 //24 bits
-#define REG_TX_FE_DC_OFFSET_Q _base + 4 //24 bits
-#define REG_TX_FE_MAG_CORRECTION _base + 8 //18 bits
-#define REG_TX_FE_PHASE_CORRECTION _base + 12 //18 bits
-#define REG_TX_FE_MUX _base + 16 //8 bits (std output = 0x10, reversed = 0x01)
+#define REG_TX_FE_DC_OFFSET_I _base + 0 * _offset //24 bits
+#define REG_TX_FE_DC_OFFSET_Q _base + 1 * _offset //24 bits
+#define REG_TX_FE_MAG_CORRECTION _base + 2 * _offset //18 bits
+#define REG_TX_FE_PHASE_CORRECTION _base + 3 * _offset //18 bits
+#define REG_TX_FE_MUX _base + 4 * _offset //8 bits (std output = 0x10, reversed = 0x01)
const std::complex<double> tx_frontend_core_200::DEFAULT_DC_OFFSET_VALUE = std::complex<double>(0.0, 0.0);
const std::complex<double> tx_frontend_core_200::DEFAULT_IQ_BALANCE_VALUE = std::complex<double>(0.0, 0.0);
@@ -39,8 +39,8 @@ tx_frontend_core_200::~tx_frontend_core_200(void){
class tx_frontend_core_200_impl : public tx_frontend_core_200{
public:
- tx_frontend_core_200_impl(wb_iface::sptr iface, const size_t base):
- _iface(iface), _base(base)
+ tx_frontend_core_200_impl(wb_iface::sptr iface, const size_t base, const size_t offset):
+ _iface(iface), _base(base), _offset(offset)
{
//NOP
}
@@ -89,8 +89,9 @@ public:
private:
wb_iface::sptr _iface;
const size_t _base;
+ const size_t _offset;
};
-tx_frontend_core_200::sptr tx_frontend_core_200::make(wb_iface::sptr iface, const size_t base){
- return sptr(new tx_frontend_core_200_impl(iface, base));
+tx_frontend_core_200::sptr tx_frontend_core_200::make(wb_iface::sptr iface, const size_t base, const size_t offset){
+ return sptr(new tx_frontend_core_200_impl(iface, base, offset));
}